• 한국산업융합학회 논문집
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• 제10권4호
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• pp.271-274
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• 2007

In this paper, we propose a intelligent controller design method for the water level control of the power plant drum in the form of nonminimum phase system. The proposed method is based on T. Takagi and M. Sugeno's fuzzy model. And we illustrate the improved characteristics as the simulation results, comparing with the conventional the PID and LQ controller design method.

• 대한안전경영과학회:학술대회논문집
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• 대한안전경영과학회 2008년도 춘계학술대회
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• pp.443-450
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• 2008

This paper is to present design principle and operation strategy of acceptance control chart by the use of OC-Based sampling inspection for continuous data. The unified control limits for acceptance control chart when considering both APL(Acceptable Process Level) and RPL(Rejectable Process Level) are proposed. The control limits can be also extended to the acceptance control chart with unknown process standard deviation.

• 한국철도학회:학술대회논문집
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• 한국철도학회 1998년도 창립기념 춘계학술대회 논문집
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• pp.249-256
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• 1998

Design target values of transmission loss in a high-speed train wall are suggested by calculating the difference between interior and exterior noise levels of it. Exterior noise level distribution on the boundary of train wall is calculated by Sysnoise, with sound source input prepared by experiments. Two kinds of exterior sound sources are considered, the rolling noise of train wheels on the rail and the aerodynamic noise from the pantograph. Interior noise level is provided by high-speed design target. Transmission loss characteristics according to the frequency band are examined.

• 대한토목학회논문집
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• 제12권3호
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• pp.39-55
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• 1992

본(本) 연구(硏究)에서는 트러스구조물(構造物)의 효율적(效率的)인 형상최적화(形狀最適化)를 위해서 3단계분할최적화(段階分割最適化) 기법(技法)을 유도(誘導)하였다. 3단계분할최적화(段階分割最適化) 기법(技法)을 적용(適用)하기 위하여 제(第)1단계(段階)에서 설계변수(設計變數)로 목적함수(目的函數)는 구조물(構造物)이 에너지를 최대(最大)로 흡수(吸收)할 수 있도록 변형(變形)에너지를 택하였으며 제약조건식(制約條件式)으로는 허용응력(許容應力), 좌굴응력(挫屈應力), 변위제약(變位制約) 및 다(多) 재하조건(載荷條件)을 고려(考慮)하여 최적화문제(最適化問題)를 형성(形成)하였다. 제(第) 2단계(段階)에서 설계변수(設計變數)는 부재단면적(部材斷面積)으로하여 목적함수(目的函數)는 구조물(構造物)의 중량(重量)이 최소(最小)가 되도록 중량함수(重量函數)를 택하였으며 제약조건식(制約條件式)으로는 제(第)1단계(段階)에서 얻은 최대변위(最大變位)를 대입(代入)한 평형조건식(平衡條件式) 및 다재하조건(多載荷條件)을 고려(考慮)하여 최적화문제(最適化問題)를 형성(形成)하였다. 제(第) 3단계(段階)에서는 조정변수(調整變數)를 절점좌표(節點座標)로 하고 목적함수(目的函數)로는 중량함수(重量函數)로 하여 최적화(最適化) 문제(問題)를 형성(形成)하였다. 이와같이 형성(形成)된 제(第)1, 제(第)2단계(段階)의 최적화(最適化) 문제(問題)는 선형계획문제(線形計劃問題)로 된다. 따라서 3단계(段階) 분할최적화(分割最適化) 기법(技法)은 최적화(最適化) 과정(過程)이 간편(簡便)하고 구조해석(構造解析) 및 감도분석(感度分析)을 위한 기법(技法)을 적용(適用)할 필요(必要)가 없으므로 최적화(最適化) 과정중(過程中) 구조해석(構造解析) 및 감도분석(感度分析)에 요구(要求)되는 시간(時間)을 줄일 수 있는 효율적(效率的)인 기법(技法)이었다. 제(第) 3단계(段階)에서는 절점좌표(節點座標)를 설계변수(設計變數)로 하므로서 무제약최적화문제(無制約最適化問題)로 형성(形成)되므로 최적화과정(最適化過程)이 용이(容易)하다. 또한 본(本) 연구(硏究)는 각(各) 단계(段階)에 각각(各各) 다른 최적화기준(最適化基準)을 사용함으로써 수염속도(收斂速度)를 향상(向上)시키고 있다. 본(本) 연구(硏究)의 기법(技法)을 4종(種)으 트러스 구조물(構造物)에 적용(適用)한 결과 트러스 구조물(構造物)의 형태(形態), 제약조건식(制約條件式)에 구애받지 않고 효율적(效率的)으로 최적해(最適解)에 수염(收斂)함과 동시(同時)에 타(他)의 연구(硏究)와 거의 동일(同一)한 연구결과(硏究結果)를 얻었다.

• 대한가정학회지
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• 제29권2호
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• pp.87-120
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• 1991

The purpose of this study was to identify the design characteristics of the multi-leveled chest(jang) which was the main furniture of the master bedrom(anbang) in the Chosun Dynasty. The major findings and conclusions were: 1. The front view of the multi-leveled chest were composed of a protruded top panel(kaepan), drawers, folded doors, sectional panels(chwibyok kan and morum kan) and base stand(madae) in general. Variety in the front view found more frequently in single level chests than bi- or tir-level chests. 2. The overall dimensions of each type of chest increased with increase in number of levels, but the height of the sectional parts decreased. That is, the overall proportion of the single level chests were 10 : 9, bi-level chests were 5 : 6, and tri-level chests were 2 : 3. The proportion of 1 : 1, 4 : 5, 1 : 3, 1 : 4, 1 : 5 were found often in the sectional parts such as drawers, doors, chwibyok kans and morum kans. 3. In general, the surface treatments were subtle. Carved or inlayed ornamentation were seldom seen, and most chess were finished with clear lacquer to show the natural wood grain. There were no distinctive characteristics of surface ornamentation characteristic of any one type of chest. 4. The general patterns of the metal ornaments were spade(yowidu), round, bow, rectangular(yakgua), bat and flower shapes. The multi-level chests were decorated with more metal ornament types compared with the single-level chests. 5. In conclusion, there was more variety in all the design elements in the single level chests compared with the other types of chests. The bi-and tri-level chests were quite stylized in composition, size, proportion, surface treatment, and metal ornamentation.

• 대한산업공학회지
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• 제29권2호
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• pp.179-189
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• 2003

Gate poly-silicon critical dimension is a prime characteristic of a metal-oxide-semiconductor field effect transistor. It is important to achieve the uniformity of gate poly-silicon critical dimension in order that a semiconductor device has acceptable electrical test characteristics as well as a semiconductor wafer fabrication process has a competitive net-die-per-wafer yield. However, on gate poly-silicon critical dimension, the complexity associated with a semiconductor wafer fabrication process entails hierarchical variance components according to run-to-run, wafer-to-wafer and even die-to-die production unit changes. Specifically, estimates of the hierarchical variance components are required not only for disclosing dominant sources of the variation but also for testing the wafer-level uniformity. In this paper, two experimental designs, a two-stage nested design and a randomized complete block design are considered in order to estimate the hierarchical variance components. Since gate poly-silicon critical dimensions are collected from fixed die positions within wafers, a factor representing die positions can be regarded as fixed in linear statistical models for the designs. In this context, the two-stage nested design also checks the wafer-level uniformity taking all sampled runs into account. In more detail, using variance estimates derived from randomized complete block designs, Duncan's multiple range test examines the wafer-level uniformity for each run. Consequently, a framework presented in this study could provide guidelines to practitioners on estimating the hierarchical variance components and testing the wafer-level uniformity in parallel for any characteristics concerned in semiconductor wafer fabrication processes. Statistical analysis is illustrated for an experimental dataset from a real pilot semiconductor wafer fabrication process.

• 복식문화연구
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• 제23권6호
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• pp.972-986
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• 2015

This study seeks to explore the relationship between clothing adaptation and acculturation for married Chinese immigrant women. In addition, it aims to analyze the differences in their clothing consumption behaviors according to acculturation level. To achieve these purposes, a quantitative research study was conducted on 291 wives of Korean-Chinese multicultural families in Seoul and Gyeonggi. The data was analyzed using factor analysis, cluster analysis, ANOVA, and the Duncun test. The findings were as follows. First, the women were divided into three groups based on their level of acculturation, which was defined as 'assimilated', 'marginalized' and 'segregated'. Second, the relationship between their acculturation level and their clothing adaptation was identified. The marginalized group had the lowest level of clothing adaptation. Third, the groups' differences in clothing selection criteria were analyzed. The segregated group considered the practical aspects (price, color, quality) of clothing to be more important than the other groups. The marginalized group scored the lowest in valuing the aesthetic factors (design, style, trendiness) of clothing. Finally, conformity of clothing consumption varied significantly based on acculturation level. The assimilated and marginalized groups showed higher levels conformity than did the segregated group. Clothing purchase location also varied significantly between the three groups. The assimilated and marginalized groups preferred online shopping, but members of the segregated group preferred to carry out their shopping off-line. This study showed that clothing adaptation and clothing consumption behaviors play key roles in understanding the acculturation of multicultural families.

• 한국정보통신학회:학술대회논문집
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• 한국정보통신학회 2013년도 춘계학술대회
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• pp.757-759
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• 2013

수 년 전까지만 해도 Verilog나 VHDL과 같은 하드웨어 기술언어 (HDL)를 사용한 레지스터 전송수준의 설계 기법은 기존의 회로도에 의존했던 방법에 비해 최첨단의 기술로 인식되었고 현재까지도 디지털 회로를 설계하는 방법으로 가장 널리 사용되고 있다. 하지만 공정 기술의 발전으로 반도체 칩의 트랜지스터 집적도가 십억 개 단위를 훌쩍 넘어서는 시대가 열림에 따라, 레지스터 전송 수준에서 회로를 설계하는 것은 너무도 복잡한 일이 되어버려, 더 이상 시대의 요구에 부응하지 못하여 설계 패러다임이 상위수준에서 설계와 합성이 이루어지는 쪽으로 변화하여야 한다. 블루스펙 HDL은 현재까지 개발된 HDL 중 유일하게 시스템 레벨에서 회로를 설계하는 것을 가능하게 함과 동시에 합성이 가능한 코드를 생성해주는 언어이다. 본 고에서는, 아직 많이 알려지지는 않았지만, 진화한 설계 패러다임을 지향하는 블루스펙 HDL에 대해 소개하고 분석하도록 한다.

• 한국전자거래학회:학술대회논문집
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• 한국전자거래학회 2003년도 종합학술대회 논문집
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• pp.54-59
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• 2003

The information sharing is essential to make collaboration by participants in the collaboration environment. The sharing of the information is necessary to reduce time-to-market of new Product. In this paper, V2-model is proposed far supporting the sharing of the information on product development. V2-model supports collaborative product development in design and supply chain. Through viewpoints, V2-model supports 1) two-level structure that consist of private level and public level ,2) level-up process and 3) product development process. The public level information supports to share the product information on collaborative supply chain and design. The viewpoints in V2-model are divided into public viewpoints that point to the public level information and private viewpoints that point to the private level information. Private viewpoints are transformed into public viewpoints. The extended Topic Map has B-Topic, S-Topic and View for representing V2-model in this paper. The level-up process of V2-model is implemented through the merging of S-Topics. V2-model is implemented with washing machine model using extended Topic Maps. In this model, the public viewpoints and private viewpoints are represented and the level-up process, which transforms private viewpoints into public viewpoints, is implemented.

• JSTS:Journal of Semiconductor Technology and Science
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• 제10권1호
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• pp.55-60
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• 2010

For battery-powered device applications, which grow rapidly in the electronic market today, low-power becomes one of the most important design issues of CMOS VLSI circuits. A multi-VDD system, which uses more than one power-supply voltage in the same system, is an effective way to reduce the power consumption without degrading operating speed. However, in the multi-VDD system, level converters should be inserted to prevent a large static current flow for the low-to-high conversion. The insertion of the level converters induces the overheads of power consumption, delay, and area. In this paper, we propose a new level converter which can provide the level up/down conversions for the various input and output voltages. Since the proposed level converter uses only one power-supply voltage, it has an advantage of reducing the complexity in physical design. In addition, the proposed level converter provides lower power and higher speed, compared to existing level converters.