JSTS:Journal of Semiconductor Technology and Science

The Institute of Electronics and Information Engineers (대한전자공학회)
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Level Up/Down Converter with Single Power-Supply Voltage for Multi-VDD Systems

  • An, Ji-Yeon (Dep. EE., Pohang University of Science and Technology) ;
  • Park, Hyoun-Soo (Dep. EE., Pohang University of Science and Technology) ;
  • Kim, Young-Hwan (Dep. EE., Pohang University of Science and Technology)
  • Received : 2009.10.01
  • Published : 2010.03.31
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Abstract

For battery-powered device applications, which grow rapidly in the electronic market today, low-power becomes one of the most important design issues of CMOS VLSI circuits. A multi-VDD system, which uses more than one power-supply voltage in the same system, is an effective way to reduce the power consumption without degrading operating speed. However, in the multi-VDD system, level converters should be inserted to prevent a large static current flow for the low-to-high conversion. The insertion of the level converters induces the overheads of power consumption, delay, and area. In this paper, we propose a new level converter which can provide the level up/down conversions for the various input and output voltages. Since the proposed level converter uses only one power-supply voltage, it has an advantage of reducing the complexity in physical design. In addition, the proposed level converter provides lower power and higher speed, compared to existing level converters.

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References

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