• 대한전자공학회:학술대회논문집
• /
• 대한전자공학회 2004년도 하계종합학술대회 논문집(2)
• /
• pp.419-422
• /
• 2004

A sensing scheme for current-mode magneto-resistance random access memory (MRAM) with a 1T1MTJ cell structure is proposed. Magnetic tunnel junction (MTJ) resistance, which is HIGH or LOW, is converted to different cell currents during READ operation. The cell current is then amplified to be evaluated by the reference cell current. In this scheme, conventional bit line sense amplifiers are not required and the operation is less sensitive to voltage noise than that of voltage-mode circuit is. It has been confirmed with HSPICE simulations using a 0.35-${\mu}m$ 2-poly 4-metal CMOS technology.

• 대한전자공학회:학술대회논문집
• /
• 대한전자공학회 2006년도 하계종합학술대회
• /
• pp.521-522
• /
• 2006

This paper presents behavioral models using SIMULINK and Verilog-a for a PLL based fractional-N frequency synthesizer. The SIMULINK modeling was built in the frequency-time mixed domain whereas the Verilog-a modeling was built purely in the time domain. The simulated results of the two models were verified to show the same performance within the error tolerance. This top-down design method can provide the readiness for the transistor-level design.

• 대한전자공학회:학술대회논문집
• /
• 대한전자공학회 2006년도 하계종합학술대회
• /
• pp.523-524
• /
• 2006

Successive approximation A/D converters have an advantage of small chip area and simple algorithm. We propose an improved non-redundant successive approximation register (SAR) which can be incorporated in successive approximation A/D converters. The proposed SAR validates the preset state as the $1^{st}$ reference voltage to the comparator. Two redundant clock cycles in the typical design could be eliminated in the proposed A/D converter.

• 대한전자공학회:학술대회논문집
• /
• 대한전자공학회 2006년도 하계종합학술대회
• /
• pp.625-626
• /
• 2006

An Ultra low power super-regenerative oscillator was implemented with on-chip inductor and quench signal generator. The super-regenerative oscillator detects the signal level as low as -70dBm while consuming only 0.48mA at 1.5V supply voltage. These results indicate that the super-regenerative oscillator can be outstanding candidate the simple, ultra low power receiver design.

• 전력전자학회:학술대회논문집
• /
• 전력전자학회 2008년도 하계학술대회 논문집
• /
• pp.406-409
• /
• 2008

This paper presents the integrated magnetic circuit designing method for phase shift full bridge(PSFB) converter. The integrated magnetic circuit is implemented on redesigned of EI core. The transformer windings are located on center leg and the two inductors are located on the outer legs with air gap. Based on the equivalent circuit model, the principle of operation of the PSFB converter is explained. The operation and performance of the proposed circuit are verified on a 1.2 kW prototype converter. The analysis and design of the integrated magnetic circuit is verified through the experimental and simulation results.

• 대한전자공학회:학술대회논문집
• /
• 대한전자공학회 2006년도 하계종합학술대회
• /
• pp.529-530
• /
• 2006

An efficient sensing scheme adoptable in DC-DC converter is described. The output voltage of the whole DC-DC converter is fed back to the input voltage of the sensor. The comparison in the sensor is accomplished by a current push-pull action. With a fixed reference, the comparator can be embodied based on (W/L) ratios. The current-mode scheme benefits the system better than a conventional voltage-mode one in terms of small area, low power consumption.

• 대한전자공학회논문지
• /
• 제24권4호
• /
• pp.618-624
• /
• 1987

This paper describes the design and fabrication of a signal processing integrated circuit required for the recording and playback of VTR audio signal. The integrated circuit was designed using 8\ulcorner design rule and its chip size is 2.5x2.5mm\ulcorner It was fabricated using SST bipolar standard process technology. The measurement analysis of the fabricated circuit proves the satisfactory DC characteristics and its proper audio signal processing funcstion.

• 전자공학회논문지C
• /
• 제35C권7호
• /
• pp.11-19
• /
• 1998

A signal line potential variation due to the delta-I noise was physically investigated in CMOS integrated circuits. An equivalent circuit for the noise analysis was presented. The signal line was modeled as segmented RC-lumped circuits with the ground noise. Then the equivalent circuit was mathematically analyzed. Therebvy a new signal line potential variation model due to the switching mosie was developed. Th emodel was verified with 0.35.mu.m CMOS deivce model parameters. The model has an excellent agreement with HSPICE simulation. Thus the proposed model can be dirctly employed in the industry to design the high-performance integrted circuit design as well as integrated circuit package design.

• Journal of Multimedia Information System
• /
• 제8권2호
• /
• pp.143-146
• /
• 2021

This work presents an automated transistor biasing scheme for analog integrated circuits. In order to effectively bias the transistor at a desired operating point, the proposed method uses a linearized transistor circuit model along with the curve fitted expressions obtained from the pre-simulated I-V characteristics of the actual transistor. As a result, the transistor size that leads to the desired operating point can be easily determined without heavily relying on the circuit simulator, which will lead to significant design time reduction. Furthermore, the proposed method is applied to an actual amplifier circuit where the design time based on the proposed biasing method showed 10× faster than the conventional design approach using the circuit simulator.

• Journal of Electrical Engineering and Technology
• /
• 제6권2호
• /
• pp.270-274
• /
• 2011

This paper presents a parameterized simulation program with integrated circuit emphasis (SPICE) model of a two-level microbolometer based on negative-temperature-coefficient thin films, such as vanadium oxide or amorphous silicon. The proposed modeling begins from the electric-thermal analogy and is realized on the SPICE modeling environment. The model consists of parametric components whose parameters are material properties and physical dimensions, and can be used for the fast design study, as well as for the co-design with the readout integrated circuit. The developed model was verified by comparing the obtained results with those from finite element method simulations for three design cases. The thermal conductance and the thermal capacity, key performance parameters of a microbolometer, showed the average difference of only 4.77% and 8.65%, respectively.