Proceedings of the IEEK Conference (대한전자공학회:학술대회논문집)

The Institute of Electronics and Information Engineers (대한전자공학회)
권호 표지

Design of A/D convertor adopting Non-redundant Successive Approximation Register

Non-redundant Successive Approximation Register를 적용한 A/D 변환기의 설계

  • Lee, Jong-Myoung (Integrated Circuit Design Laboratory School of Electrical Engineering, Kookmin University) ;
  • You, Jae-Woo (Integrated Circuit Design Laboratory School of Electrical Engineering, Kookmin University) ;
  • Kim, Bum-Soo (Integrated Circuit Design Laboratory School of Electrical Engineering, Kookmin University) ;
  • Kim, Dea-Jeong (Integrated Circuit Design Laboratory School of Electrical Engineering, Kookmin University)
  • 이종명 (국민대학교 전자정보통신대학 전자공학과) ;
  • 유재우 (국민대학교 전자정보통신대학 전자공학과) ;
  • 김범수 (국민대학교 전자정보통신대학 전자공학과) ;
  • 김대정 (국민대학교 전자정보통신대학 전자공학과)
  • Published : 2006.06.21
Download PDF
⟨ Previous Next ⟩

Abstract

Successive approximation A/D converters have an advantage of small chip area and simple algorithm. We propose an improved non-redundant successive approximation register (SAR) which can be incorporated in successive approximation A/D converters. The proposed SAR validates the preset state as the $1^{st}$ reference voltage to the comparator. Two redundant clock cycles in the typical design could be eliminated in the proposed A/D converter.

Keywords