• Journal of electromagnetic engineering and science
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• v.15 no.2
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• pp.76-81
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• 2015

This paper presents a design of a transmission line negative group delay (NGD) circuit with multiple pole characteristics. By inserting an additional transmission line into a conventional NGD circuit, the proposed circuit provides further design parameters to obtain wideband group delay (GD) and to help reduce signal attenuation. As a result, the number of gain compensating amplifiers can be reduced, which can contribute to stable operation when integrated into RF systems. The multiple pole characteristics can provide wider NGD bandwidth and can be obtained by connecting resonators with slightly different center frequencies separated by quarter-wavelength transmission lines. For experimental validation, an NGD circuit with two poles GD characteristic is designed, simulated, and measured.

• Journal of Industrial Technology
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• v.11
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• pp.43-53
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• 1991

Two kinds of simple active oscillators are proposed and analyzed assuming that operational amplifier has two-poles frequency characteristics. The first circuit is composed of one operational amplifier, one resistor and one grounded capacitor. The second oscillator is realized with one operational amplifier and three resitors. Proposed oscillators have the low sensitivity of the oscillation frequency for little variations of the passive element values. By the experimental results obtained with Op-Amp. ${\mu}A741$, the simple oscillators can be useful for the frequency range $1.25 KHz{\leq}f_{01}{\leq}40KHz$ for the active-RC type or $45.45 KHz{\leq}f_{02}{\leq}400KHz$ for the active-R oscillator, and it is shown to transform the active-R oscillator circuit into the voltage controlled type. Therefore, two kinds of oscillator circuit are attractive for the IC realization, because they have one operational amplifier, one resistor and one grounded capacitor, or three resistors.

• Journal of Information Display
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• v.5 no.2
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• pp.1-5
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• 2004

We developed an a-Si TFT-LCD panel with integrated gate driver circuit using a standard 5-MASK process. To minimize the effect of the a-Si TFT current and LC's capacitance variation with temperature, we developed a new a-Si TFT circuit structure and minimized coupling capacitance by changing vertical architecture above gate driver circuit. Integration of gate driver circuit on glass substrate enables single chip and 3-side free panel structure in a-Si TFT-LCD of QVGA ($240{\times}320$) resolution. And using double ASG structure the dead space of TFT-LCD panel could be further decreased.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.23 no.2
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• pp.89-92
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• 2010

A bolometer sensor used in an infrared thermal imaging system has many advantages on the process because it does not need a separate cooling system and its manufacturing is easy. However the sensitivity of the bolometer is low and the fixed pattern noise(FPN) is large, because the bolometer sensor is made by micro electro mechanical systems (MEMS). These problems can be fixed-by using the high performance readout integrated circuit(ROIC) with noise reduction techniques. In this paper, we propose differential delta sampling circuit to remove the mismatch noise of ROIC itself, the FPN of the bolometer. And for reduction of FPN noise, the reference signal compensation circuit which compensate the reference signal by using on-resistance of MOS transistor was proposed.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2004.07a
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• pp.130-133
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• 2004

The characterization of interdigitated capacitors was investigated. The test structures are manufactured by low temperature co-fired ceramic(LTCC) process and their s-parameters were measured. The optimized equivalent circuit models for test structures were obtained using the partial element equivalent circuit(PEEC) method. Predictive modeling was performed on different test structures using optimized parameters to verify the circuit models. From this result, the manufacturability on the process can be improved through the predictive modeling for the characteristics of interdigitated capacitors.

• Journal of Electrical Engineering and Technology
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• v.2 no.3
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• pp.289-293
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• 2007

The fault current limiting characteristics of the separated and the integrated three-phase flux-lock type superconducting fault current limiters (SFCLs) were analyzed. The three-phase flux-lock type SFCL consisted of three flux-lock reactors and three $high-T_c$ superconducting (HTSC) elements. In the integrated three-phase flux-lock type SFCL, three flux-lock reactors are connected on the same iron core. On the other hand, three flux-lock reactors of the separated three-phase flux-lock type SFCL are connected on three separated iron cores. The integrated three-phase flux-lock type SFCL showed the different fault current limiting characteristics from the separated three-phase flux-lock type SFCL that the fault phase could affect the sound phase, which resulted in quench of the HTSC element in the sound phase. Through the computer simulation applying numerical analysis for its three-phase equivalent circuit, the fault current limiting characteristics of the separated and the integrated three-phase flux-lock type SFCLs according to the ground fault types were compared.

• Journal of Power Electronics
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• v.14 no.2
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• pp.257-264
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• 2014

A novel converter-free AC LED driver that is highly resistant to the fluctuation of AC voltage is proposed in this study. By removing large passive components, such as the bulky capacitor and the large-value inductor, the integration of the driver circuit is enhanced while the driving current remains stable. The proposed circuit provides LED lamps with a driving current that can follow the sinusoid waveform to obtain a very high power factor (PF) and low total harmonic distortion (THD). The LED input current produced by this driving current is insensitive to fluctuations in the AC voltage. Users will thus not feel that LED lamps are flashing during the fluctuation. Experiment results indicate that the proposed system can obtain PF of 0.999 and THD as low as 3.3% for a five-string 6 W LED load under 220 V at 50 Hz.

• Electronics and Telecommunications Trends
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• v.36 no.3
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• pp.53-64
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• 2021

As the 5G service market is expected to grow rapidly, the development of high-power, high-efficiency power amplifiers for the 5G communication infrastructure is indispensable. Gallium nitride (GaN) is attracting great interest as a key device in power devices and integrated circuits due to its wide bandgap, high carrier concentration, high electron mobility, and high-power saturation characteristics. In this study, we investigate the technology trends of Ka-band GaN radio frequency (RF) power devices and integrated circuits for operation in the millimeter-wave band of recent 5G mobile communication services. We review the characteristics of GaN RF high electron mobility transistor (HEMT) devices to implement power amplifiers operating at frequencies around 28 GHz and compare the technology of foreign companies with the device characteristics currently developed by the Electronics and Telecommunication Research Institute (ETRI). In addition, the characteristics of Ka-band GaN monolithic microwave integrated circuit (MMIC) power amplifiers manufactured using various GaN HEMT device technologies are reviewed by comparing characteristics such as frequency band, output power, and output power density of integrated circuits. In addition, by comparing the performance of the power amplifier developed by ETRI, the current status and future direction of domestic GaN power devices and integrated circuit technology will be discussed.

• Journal of Advanced Marine Engineering and Technology
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• v.32 no.8
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• pp.1263-1268
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• 2008

In this paper, the low noise power amplifier for GaAs FET ATF-10136 is designed and fabricated with active bias circuit and self bias circuit. To supply most suitable voltage and current, active bias circuit is designed. Active biasing offers the advantage that variations in the pinch-off voltage($V_p$) and saturated drain current($I_{DSS}$) will not necessitate a change in either the source or drain resistor value for a given bias condition. The active bias network automatically sets a gate-source voltage($V_{gs}$) for the desired drain voltage and drain current. Using resistive decoupling circuits, a signal at low frequency is dissipated by a resistor. This design method increases the stability of the LNA, suitable for input stage matching and gate source bias. The LNA is fabricated on FR-4 substrate with active and self bias circuit, and integrated in aluminum housing. As a results, the characteristics of the active and self bias circuit LNA implemented more than 13 dB and 14 dB in gain, lower than 1 dB and 1.1 dB in noise figure, 1.7 and 1.8 input VSWR at normalized frequency $1.4{\sim}1.6$, respectively.

• Journal of information and communication convergence engineering
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• v.15 no.2
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• pp.112-116
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• 2017

In this work, we demonstrated a low noise and high linearity low noise amplifier (LNA) monolithic microwave integrated circuit (MMIC) with novel active bias circuit for LTE applications. The device technology used in this work relies on a process involving a $0.25-{\mu}m$ GaAs pseudomorphic high electron mobility transistor (PHEMT). The LNA MMIC with a novel active bias circuit has a small signal gain of $19.7{\pm}1.5dB$ and output third order intercept point (OIP3) of 38-39 dBm in the frequency range 1.75-2.65 GHz. The noise figure (NF) is less than 0.58 dB over the full bandwidth. Compared with the characteristics of the LNA MMIC without using the novel active bias circuit, the OIP3 is improved about 2-3 dBm. The small signal gain and NF showed no significant change after using the active bias circuit. The novel active bias circuit indeed improves the linearity performance of the LNA MMIC without degradation.