• 전자공학회논문지A
• /
• 제31A권12호
• /
• pp.91-99
• /
• 1994

We used CMOS current mirror and differenial amplifier to find out how the degradation of each devices in circuit affect total circuit performance. The devices in circuit wer degraded by hot-carrier generated during circuit operation and total circuit performance were changed according to the change of each device parameters. To examine the circuit performance phenomena of current mirror, we analyzed three diffent kinds of current mirrors and made correlation model between circuit performance and stressed device parameters, and compare hot-carrier immunity of these circuits. Also we analyzed how the performance of differential amplifier degraded from the initial value after hot-carrier stress incircuit operations.

• 대한전자공학회:학술대회논문집
• /
• 대한전자공학회 1999년도 하계종합학술대회 논문집
• /
• pp.243-246
• /
• 1999

We studied the MOSFET characteristics and the hot-carrier reliability with the sidewall spacer composition and the post gate oxidation thickness in 0.20${\mu}{\textrm}{m}$ gate length transistor. The MOSFET with NO(Nitride＋Oxide) sidewall spacer exhibits the large degradation of hot-carrier lifetime because there is no buffering oxide against nitride stress. When the post gate oxidation is skipped, the hot-carrier lifetime is improved, but GIDL (Gate Induced Drain Leakage) current is also increased.

• 전자공학회논문지D
• /
• 제34D권7호
• /
• pp.23-29
• /
• 1997

The performance degradation of CMOS differential amplifiers due to hot carrier effect has been measured and analyzed. Two-state CMOS amplifiers whose input transistors are PMOSFETs were designed and fabriacted using the ISRC CMOS 1.5.mu.m process. It was observed after the amplifier was hot-carrier stressed that the small-signal voltage gain and the input offset voltage increased and the phase margin decreased. The performance variation results from the increase of the transconductances and gate capacitances of the PMOSFETs used as input transistors in the differential input stage and the output stage and also resulted from the decrease of their output conductances. After long-term stress, the amplifier became unstable. The reason might be that its phase margin was reduced due to hot carrier effect.

• 한국컴퓨터정보학회논문지
• /
• 제9권1호
• /
• pp.9-15
• /
• 2004

본 논문에서는 드레인 부근의 채널 영역에서 접합 전계를 줄이는 WSW(Wrap Side Wall) 구조의 소자를 제안하였다. WSW구조의 소자 제작은 첫 번째 게이트를 식각한 후에 NM1(N-type Minor1) 이 온주입을 하고 다시 질화막을 덮어 식각함으로서 만들어진다. 새로운 WSW구조는 전계를 줄이기 위한 버퍼층으로 되어 있으며 WSW소자와 LDD구조의 소자 수명을 비교하였으며 핫-캐리어 열화 특성도 분석하였다. 또한 AC 핫-캐리어 열화를 칩 상에서 평가하기 위해 펄스 발생기, 레벨 시프터, 주파수 분배기를 포함한 테스트 패턴 회로를 설계하였다. 이러한 것은 AC와 DC 스트레스간의 핫-캐리어 열화 조건이 AC와 DC 스트레스 모두 동일한 물리적 메커니즘을 지닌다는 것을 알 수 있었다. 따라서 일반적으로 회로 동작 조건 하에서 DC 핫-캐리어 열화 특성을 토대로 AC 소자 수명도 예측할 수 있었다.

• 한국전기전자재료학회논문지
• /
• 제33권3호
• /
• pp.169-172
• /
• 2020

In this paper, the effect of hot carrier injection on an n-bulk fin field-effect transistor (FinFET) is analyzed. The hot carrier injection method is applied to determine the performance change after injection in two ways, channel hot electron (CHE) and drain avalanche hot carrier (DAHC), which have the greatest effect at room temperature. The optimum condition for CHE injection is V_G=V_D, and the optimal condition for DAHC injection can be indirectly confirmed by measuring the peak value of the substrate current. Deterioration by DAHC injection affects not only hot electrons formed by impact ionization, but also hot holes, which has a greater impact on reliability than CHE. Further, we test the amount of drain voltage that can be withstood, and extracted the lifetime of the device. Under CHE injection conditions, the drain voltage was able to maintain a lifetime of more than 10 years at a maximum of 1.25 V, while DAHC was able to achieve a lifetime exceeding 10 years at a 1.05-V drain voltage, which is 0.2 V lower than that of CHE injection conditions.

• 한국정보디스플레이학회:학술대회논문집
• /
• 한국정보디스플레이학회 2007년도 7th International Meeting on Information Display 제7권2호
• /
• pp.1065-1070
• /
• 2007

The effects of hot carriers and self-heating on the electrical stability of p-channel TFTs have been analysed combining experimental data and numerical simulations. While hot carrier effects were shown not to induce appreciable degradation, self-heating related instability was found to more seriously affect the device characteristics. New models have been developed to explain the reported results.

• 한국전기전자재료학회논문지
• /
• 제17권6호
• /
• pp.586-591
• /
• 2004

We studied the dependence of hot-tarrier-induced degradation characteristics on nitrogen concentration in NO(Nitrided-Oxide) gate of nMOS, under ac and dc stresses. The $\Delta$V$_{t}$ and $\Delta$G$_{m}$ dependence of nitrogen concentration were observed, We observed that device degradation was suppressed significantly when the nitrogen concentration in the gate was increased. Compared to $N_2$O oxynitride, NO oxynitride gate devices show a smaller sensitivity to ac stress frequency. Results suggest that the improved at-hot carrier immunity of the device with NO gate may be due to the significantly suppressed interface state generation and neutral trap generation during stress.ess.

• 대한전기학회:학술대회논문집
• /
• 대한전기학회 1998년도 하계학술대회 논문집 D
• /
• pp.1367-1369
• /
• 1998

To achieve the ULSI goals of higher density, greater performance and operation speed have been scaled down. However, the reduction of channel length cause undesirable problems such as drop of punchthrough voltage, hot-carrier degradation and high leakage current, etc.. It is shown that the device characteristics depend on process parameters. In this Paper, we catched hold of trends of hot-carrier effects and punchthrough voltages due to variation of some process parameters such as LDD doses(P), spacer lengths, channel doses($BF_2$) and $V_T$ adjusting channel implantation energies using design trend curve (DTC). As the LDD and channel doses increased, hot-carrier phenomena became more severe, and punchthrough voltage was decreased. It were represented that punchthrough and hot carrier effects were critically depend on LDD and channel doses.

• 대한전자공학회:학술대회논문집
• /
• 대한전자공학회 1998년도 하계종합학술대회논문집
• /
• pp.433-436
• /
• 1998

Hot carrier induceed the performance degradation of sense amplifier circuit in DRAM has been measured and analyzed using 0.8.mu.m CMOS process. Simulation and experimental results show that the degradation of the MOS devices affects the decrease of the half-Vcc, voltage gain and the increase of the sensing voltage gain and the increase of the sensing voltage. The dominant degradation mechanism is the capacitance imblance in the bit-line pair. We carried out the spice simulation to investigate the degradation of the sense amplifier circuit.

• E2M - 전기 전자와 첨단 소재
• /
• 제8권3호
• /
• pp.357-361
• /
• 1995

An experiment on characteristics of nMOSFET's in the long stress condition with the maximum of the substrate current has been carried out in order to study on the degradation due to the hot-carrier effect. Based on the measured result of the threshold voltage, the damage is mostly due to the hole injection into the oxide. After long stress, it was shown that the drain current increased at low gate voltages and hence decreased at high gate voltages.