• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.33 no.6
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• pp.445-449
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• 2020

Non-volatile memory is approaching its fundamental limits with the Si₃N₄ storage layer, necessitating the use of alternative materials to achieve a higher programming/erasing speed, larger storage window, and better data retention at lower operating voltage. This limitation has restricted the development of the charge-trap memory, but can be addressed by using high-k dielectrics. The paper reviews the doping of nitrogen, titanium, and yttrium on high-k dielectrics as a storage layer by comparing MONOS devices with different storage layers. The results show that nitrogen doping increases the storage window of the Gd₂O₃ storage layer and improves its charge retention. Titanium doping can increase the charge capture rate of HfO₂ storage layer. Yttrium doping increases the storage window of the BaTiO₃ storage layer and improves its fatigue characteristics. Parameters such as the dielectric constant, leakage current, and speed of the memory device can be controlled by maintaining a suitable amount of external impurities in the device.

• JSTS:Journal of Semiconductor Technology and Science
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• v.3 no.1
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• pp.13-20
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• 2003

Both MgO and $Sc_2O_3$ are shown to provide low interface state densities (in the $10^{11}{\;}eV^{-1}{\;}cm{\;}^{-2}$ range)on n-and p-GaN, making them useful for gate dielectrics for metal-oxide semiconductor(MOS) devices and also as surface passivation layers to mitigate current collapse in GaN/AlGaN high electron mobility transistors(HEMTs).Clear evidence of inversion has been demonstrated in gate-controlled MOS p-GaN diodes using both types of oxide. Charge pumping measurements on diodes undergoing a high temperature implant activation anneal show a total surface state density of $~3{\;}{\times}{\;}10^{12}{\;}cm^{-2}$. On HEMT structures, both oxides provide effective passivation of surface states and these devices show improved output power. The MgO/GaN structures are also found to be quite radiation-resistant, making them attractive for satellite and terrestrial communication systems requiring a high tolerance to high energy(40MeV) protons.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.20 no.9
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• pp.1771-1777
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• 2016

In this thesis, the breakdown voltage characteristics of silicon nanowire N-channel GAA MOSFETs were analyzed through experiments and 3-dimensional device simulation. GAA MOSFETs with the gate length of 250nm, the gate dielectrics thickness of 6nm and the channel width ranged from 400nm to 3.2um were used. The breakdown voltage was decreased with increasing gate voltage but it was increased at high gate voltage. The decrease of breakdown voltage with increasing channel width is believed due to the increased current gain of parasitic transistor, which was resulted from the increased potential in channel center through floating body effects. When the positive charge was trapped into the gate dielectrics after gate stress, the breakdown voltage was decreased due to the increased potential in channel center. When the negative charge was trapped into the gate dielectrics after gate stress, the breakdown voltage was increased due to the decreased potential in channel center. We confirmed that the measurement results were agreed with the device simulation results.

• 한국정보디스플레이학회:학술대회논문집
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• 2008.10a
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• pp.1564-1567
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• 2008

We demonstrate here a self-aligned printing approach that allows downscaling of printed organic thin-film transistors to channel lengths of 100 - 400 nm. A perfected down-scaled polymer transistors (L= 200 nm) showing high transition frequency over 1.5 Mhz were realized with thin polymer dielectrics, controlling contact resistance, and minimizing overlap capacitance via self-aligned gate configuration.

• JSTS:Journal of Semiconductor Technology and Science
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• v.4 no.3
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• pp.228-239
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• 2004

In this paper, an analytical model accounting for the quantum effects in MOSFETs has been developed to study the behaviour of $high-{\kappa}$ dielectrics and to calculate the threshold voltage of the device considering two dielectrics gate stack. The effect of variation in gate stack thickness and permittivity on surface potential, inversion layer charge density, threshold voltage, and $I_D-V_D$ characteristics have also been studied. This work aims at presenting a relation between the physical gate dielectric thickness, dielectric constant and substrate doping concentration to achieve targeted threshold voltage, together with minimizing the effect of gate tunneling current. The results so obtained are compared with the available simulated data and the other models available in the literature and show good agreement.

• Journal of the Microelectronics and Packaging Society
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• v.15 no.4
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• pp.25-29
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• 2008

Reliability and performance in metal gate/high-k device with multiple gate dielectrics were investigated. MOSFETs with a thin $HfSiO_x$ layer on a thermal Si02 dielectric as gate dielectrics exhibit excellent mobility and low interface trap density. However, the distribution of threshold voltages of $HfSiO_x/SiO_2$ stack devices were wider than those of $SiO_2$ and $HfSiO_x$ single layer devices due to the penetration of Hf and/or intermixing of $HfSiO_x$ with underlying $SiO_2$. The results of TZDB and SILC characteristics suggested that a certain portion of $HfSiO_x$ layer reacted with the underlying thick $SiO_2$ layer, which in turn affected the reliability characteristics.

• Electrical & Electronic Materials
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• v.16 no.9
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• pp.61.3-62
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• 2003

• Journal of Powder Materials
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• v.17 no.4
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• pp.289-294
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• 2010

For the aim of low-temperature co-fired ceramic microwave components, sintering behavior and microwave properties (dielectric constant ${\varepsilon}_r$, quality factor Q, and temperature coefficient of resonant frequency ${\tau}_f$) are investigated in $Bi_{18}O(Ca_{0.725}Zn_{0.275})_8Nb_{12}O_{65}$ [BCZN] ceramics with addition of $V_2O_5$. The specimens are prepared by conventional ceramic processing technique. As the main result, it is demonstrated that the additives ($V_2O_5$) show the effect of lowering of sintering temperature and improvement of microwave properties at the optimum additive content. The addition of 0.25 wt% $V_2O_5$ lowers the sintering temperature to $890^{\circ}C$ utilizing liquidphase sintering and show the microwave dielectric properties (dielectric constant ${\varepsilon}_r$ = 75, quality factor $Q{\times}f$ = 572 GHz, temperature coefficient of resonance frequency ${\tau}_f\;=\;-10\;ppm/^{\circ}C$). The estimated microwave dielectric properties with $V_2O_5$ addition (increase of ${\varepsilon}_r$, decrease of $Q{\times}f$, shift of ${\tau}_f$ to negative values) can be explained by the observed microstrucure (sintered density, abnormal grain structure) and possibly high-permittivity $Bi_{18}Zn_8Nb_{12}O_{65}$ (BZN) phase determined by X-ray diffraction.

• 한국정보디스플레이학회:학술대회논문집
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• 2009.10a
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• pp.826-829
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• 2009

The authors report on the fabrication of p-type depletion mode inverter that composed of two pentacene based thin-film transistors (TFTs) on several dielectric surfaces. We use shift of threshold voltage depends on pentacene-thickness.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.24 no.12
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• pp.955-961
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• 2011

We investigated the physical properties of stoichiometric and non-stoichiometric oxide doped complex perovskite, $Ba(Zn_{1/3}Ta_{2/3})O_3$ ceramics and their impacts on the microwave dielectric performances using various characterization techniques such as X-ray diffraction, scanning electron microscopy, transmission electron microscopy, and network analyzer. According to the measurement of lattice constant changes, anomalous lattice volume contraction of $ZrO_2$ doped $Ba(Zn_{1/3}Ta_{2/3})O_3$ sample only showed the dielectric quality factor enhancements, which was due to the lattice volume contraction as well as the 1:2 B-site cation ordering. In addition, NiO doping was useful to the stabilization of temperature coefficient of resonance frequency.