• International journal of advanced smart convergence
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• v.9 no.1
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• pp.172-176
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• 2020

The implementation of a low phase noise voltage controlled oscillator (VCO) is important for the signal integrity of wireless communication terminal. A low phase noise wideband VCO for a wireless local area network (WLAN) application is presented in this paper. A 6-bit coarse tune capacitor bank (capbank) and a fine tune varactor are used in the VCO to cover the target band. The simulated oscillation frequency tuning range is from 8.6 to 11.6 GHz. The proposed VCO is desgned using 65 nm CMOS technology with a high quality (Q) factor bondwire inductor. The VCO is biased with 1.8 V VDD and shows 9.7 mA current consumption. The VCO exhibits a phase noise of -122.77 and -111.14 dBc/Hz at 1 MHz offset from 8.6 and 11.6 GHz carrier frequency, respectively. The calculated figure of merit(FOM) is -189 dBC/Hz at 1 MHz offset from 8.6 GHz carrier. The simulated results show that the proposed VCO performance satisfies the required specification of WLAN standard.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.42 no.9 s.339
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• pp.1-8
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• 2005

A $0.35\mu$m SiGe BiCMOS fabrication process has been timely developed, which is aiming at wireless RF ICs development and fast growing SiGe RF market. With non-selective SiGe epilayer, SiGe HBTs in this process used trapezoidal Ge base profile for the enhanced AC performance via Ge induced bandgap niuoin. The characteristics of hFE 100, $f_{T}\;45GHz,\;F_{max}\;50GHz,\;NF_{min}\;0.8dB$ have been obtained by optimizing not only SiGe base profile but also RTA condition after emitter polysilicon deposition, which enables the SiGe technology competition against the worldwide cutting edge SiGe BiCMOS technology. In addition, the process incorporates the CMOS logic, which is fully compatible with $0.35\mu$m pure logic technology. High Q passive elements are also provided for high precision analog circuit designs, and their quality factors of W(1pF) and inductor(2nH) are 80, 12.5, respectively.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.8 no.3
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• pp.454-459
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• 2007

In this work, micro-scale, high-performance solenoid-type RF chip inductors utilizing amorphous $Al_2O_3$ core material were investigated. The size of the chip inductors was $0.86{\times}0.46{\times}0.45mm^3$ and copper(Cu) wire with $27{\mu}m$ diameter was used as the coil. High frequency characteristics of the inductance(L), quality factor(Q), impedance(Z), and equivalent circuit parameters of the RE chip inductors were measured and analyzed using an RF impedance/material analyzer(HP4291B with HP16193A test fixture). It was observed that the RF chip inductors with the number of turns of 9 to 12 have the inductance of 21 to 34nH and exhibit the self-resonant frequency(SRF) of 5.7 to 3.7GHz. The SRF of inductors decreases with increasing the inductance and inductors have the quality factor of 38 to 49 in the frequency range of 900MHz to 1,7GHz.

• Journal of Electrical Engineering and Technology
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• v.13 no.1
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• pp.220-225
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• 2018

A class E power oscillator is demonstrated for 6.78-MHz wireless power transfer system. The oscillator is designed with a class E power amplifier to use an LC feedback network with a high-Q inductor between the input and the output. Multiple capacitors are used to minimize the variation of the oscillation frequency by capacitance tolerance. The gate and drain bias voltages with opposite characteristics to make the frequency shift of the oscillator are connected in a resistance distribution circuit located at the output of the low drop-out regulator and supplied bias voltages for class E operation. The measured output of the class E power oscillator, realized using the co-simulation, shows 9.2 W transmitted power, 6.98 MHz frequency and 86.5% transmission efficiency at the condition with 20 V $V_{DS}$ and 2.4 V $V_{GS}$.

• ETRI Journal
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• v.25 no.2
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• pp.65-72
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• 2003

To achieve cost and size reductions, we developed a low cost manufacturing technology for RF substrates and a high performance passive process technology for RF integrated passive devices (IPDs). The fabricated substrate is a conventional 6" Si wafer with a 25${\mu}m$ thick $SiO_2$ surface. This substrate showed a very good insertion loss of 0.03 dB/mm at 4 GHz, including the conductive metal loss, with a 50 ${\Omega}$ coplanar transmission line (W=50${\mu}m$, G=20${\mu}m$). Using benzo cyclo butene (BCB) interlayers and a 10 ${\mu}m$ Cu plating process, we made high Q rectangular and circular spiral inductors on Si that had record maximum quality factors of more than 100. The fabricated inductor library showed a maximum quality factor range of 30-120, depending on geometrical parameters and inductance values of 0.35-35 nH. We also fabricated small RF IPDs on a thick oxide Si substrate for use in handheld phone applications, such as antenna switch modules or front end modules, and high-speed wireless LAN applications. The chip sizes of the wafer-level-packaged RF IPDs and wire-bondable RF IPDs were 1.0-1.5$mm^2$ and 0.8-1.0$mm^2$, respectively. They showed very good insertion loss and RF performances. These substrate and passive process technologies will be widely utilized in hand-held RF modules and systems requiring low cost solutions and strict volumetric efficiencies.

• Journal of the Korean Magnetics Society
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• v.8 no.4
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• pp.241-248
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• 1998

In accordance with tendency to miniaturization and high frequency operation of electronic products, extensive efforts of miniaturizing magnetic devices such as inductors, transformers and magnetic sensors are being made. In order to study on fabrication and characteristic of micro-magnetic devices, we carried out two sets of experiments. One is to develop a magnetic film that is suitable for high frequency operation, and the other is to develop the fabrication processes for realizing the micro-coil with meander shape. Magnetic films were composed of FeTa(N,C) fabricated by DC magnetron sputtering system. Their microstructures were nanocrystalline structure and magnetic properties showed Bs:13~17 kG, Hc:0.1~0.2 Oe and $\mu$':2000~4000. Cu coil pattern fabricated by selective electroplating process showed good electrical conductivity. In the case of air core inductors, inductance (L) of 50 nH, resonance frequency $(f_R)$ of 700 MHz, and quality factor (Q) of 30 at 200 MHz could be obtained. In the case of close type magnetic inductors, inductance (L) of 150 nH, resonance frequency $(f_R)$ of 100 MHz, and quality factor (Q) of 4 at 10~30 MHz could be obtained.

• Proceedings of the KIPE Conference
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• 2012.11a
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• pp.88-90
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• 2012

A study on an integrated single stage AC/DC converter is presented in this paper. The input current can be controlled by the auxiliary winding($L_{aux}$), auxiliary primary winding($N_3$), and the boost inductor($L_B$) which are designed to operate in discontinuous conduction mode(DCM) to reduced the total harmonic distortion(THD) of input current. The auxiliary primary winding($N_3$) is critically selected in order to compress the input capacitor voltage($V_{in}$) as well as to reduce the current stress of the switch(Q). Low total harmonic distortion(THD), low input voltage($V_{in}$) in universal input voltage($V_{AC}$), low current stress at the switching device and high efficiency are the main consideration keys in this design to achieve high performance system with low cost of single stage AC/DC converter. A 30W single stage AC/DC prototype converter is under study.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.49 no.6
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• pp.1-8
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• 2012

This paper presents a fully-integrated buck converter equipped with packaging inductors. These inductors include parasitic inductances of the bonding wires and lead frames in the package. They have significantly better Q factors than the best on-chip inductors implemented on silicon. This paper also proposes a low-swing gate driver for efficient regulation of high-frequency switching converters. The low-swing driver uses the voltage drop of a diode-connect transistor. The proposed converter is designed and fabricated using a $0.13-{\mu}m$ CMOS process. The fully-integrated buck converter achieves 68.7% and 86.6% efficiency for 3.3 V/2.0 V and 2.8 V/2.3 V conversions, respectively.

• Proceedings of the KIEE Conference
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• 1994.07a
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• pp.535-538
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• 1994

In this paper, an isolated ZVS-PWM boost converter is proposed for single stage line conversion. For power factor correction, we used the half bridge topology at the primary side of isolation transformer permitting switching devices to operate under ZVS by using circuit parastics and operating at a fixed duty ratio near 50%. Thus the relatively continuous input current distortion and small size input filter are also achievable. The ZVS-PWM boost operation of the proposed converter can be achieved by using the boost inductor $L_f$, main switch $Q_3$, and simple auxiliary circuit at the secondary side of isolation transformer. The secondary side circuit differ from a conventional PWM boost converter by introduction a simple auxiliary circuit. The auxiliary circuit is actived only during a short switching transition time to create the ZVS condition for the main switch as that of the ZVT-PWM boost converter. With a single stage, it is possible to achieve a sinusoidal line current at unity power factor as well as the isolated 48V DC output. Comparing to the two stage schemes, overall effiency of the proposed converter is highly improved due to the effective ZVS of all devices as well as single stage power conversion. Thus, it can be operated at high switching frequency allowing use of small size input filter. Minimum voltage and current stress make it high power application possible.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.39 no.2
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• pp.104-115
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• 2002

Core is the main component of inductor. This core should be classified into around 10 classes according to the value of inductance and Q. The coil should be winded with the outer-boundary of this core by different number of turns. Theses kind of precise inductors would be required in the future environment which PCs and communication devices demand more high speed and lower voltage level. It would be quite unefficient that only one core is classified once a time. There, it will be developed so that 10 cores are classified simultaneously. For the operation of classifying 10 cores once in a time, suppose 10 test instruments could be used. In this case, it would take much cost since a test instrument Is expensive. So, by using only one test instrument, it is really more desirable that this system is developed. Each core classified by 10 different classes is to be stored into the corresponding box through the corresponding rubber hose. 10 cores are passed on a serial line and are placed on each testing slot. Here, each core located at each slot is tested, and then the bowl located on the top of a step motor is moved into the corresponding spot by rotating step motor with some angles. Each bowl connected with the corresponding box through rubber hose. Actually 100 hoses are connected, 10 step motors are rotated at 10 different angles, so the size is really so big, the shape of connecting 100 hoses is so complicated. Therefore it is anticipated that the system would be going to be easily out of ordered. In this paper the main purpose is to make several suggestions to be able to work well in these kinds of being affected by the abnormal operation of motors and the flow of cores.