• Proceedings of the KIEE Conference
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• 1997.07f
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• pp.2075-2077
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• 1997

An electronic starter using MOSFET is developed to take advantage of ideal preheating and starting features which can extend the lifetime of fluorescent lamps. The preheating curcuit of the developed electronic starter is consisted of three parts - a full wave rectifier curcuit, an FET switching curcuit, and a timer curcuit for the gate switching. The curcuit allows sufficient preheating current flow before the starting to protect lamp filaments, nevertheless it shortens the Preheating time and enables a single pulse ignition at the peak level of the line voltage. Experimental results show that fluorescent lamps of 20-40W range can be initiated within rather short time of $1{\sim}1.5sec$ with preheating current of 0.6A. The electronic starter withstands more than 70.000 cycles switchings without noticeable blackening due to anode spot. These features provide Proper evidences for the advantage of direct replacement with the new starter.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.22 no.11
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• pp.910-917
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• 2009

We have designed a new structures of Junction Field Effect Transistor(JFET) using SILVACO simulation to improve electrical properties and process reliability. The device structure and process conditions of Si control JFET(Si JFET) were determined to set cut off voltage and drain current(at Vg=0 V) to -0.46 V and $300\;{\mu}A$, respectively. Among many design parameters influencing the performance of the device, the drive-in time of p-type gate is presented most predominant effects. Therefore we newly designed SiGe JFET, in which SiGe layers were placed above and underneath of Si-channel. The presence of SiGe layer could lessen Boron into the n-type Si channel, so that it would be able to enhance the structural consistency of p-n-p junction. The influence of SiGe layer could be explained in conjunction with boron diffusion and corresponding I-V characteristics in comparison with Si-control JFET.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.27 no.5
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• pp.282-285
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• 2014

We have investigated the structural and electrical properties of Si-Zn-Sn-O (SZTO) thin films deposited by RF magnetron sputtering at various deposition temperatures from RT to $350^{\circ}C$. All the SZTO thin fims are amorphous structure. The mobility of SZTO thin film has been changed depending on the deposition temperature. SZTO thin film transistor shows mobility of 8.715 $cm^2/Vs$ at room temperature. We performed the electrical stress test by applying gate and drain voltage. SZTO thin film transistor shows good stability deposited at room temperature while showing poor stability deposited at $350^{\circ}C$. As a result, the electrical performance and stability have been changed depending on deposition temperature mainly because high deposition temperature loosened the amorphous structure generating more oxygen vacancies.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.26 no.4
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• pp.284-288
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• 2013

Power MOSFETs(Metal Oxide Semiconductor Field Effect Transistor) operate as energy control semiconductor switches. In order to reduce energy loss of the device during switch-on state, it is essential to increase its conductance. We have experimental results and explanations on the doping profile dependence of the electrical behavior of the vertical MOSFET. The device is fabricated as $8.25{\mu}m$ cell pitch and $4.25{\mu}m$ gate width. The performances of device with various p base doping concentration are compared at Vth from 1.77 V to 4.13 V. Also the effect of the cell structure on the on-resistance and breakdown voltage of the device are analyzed. The simulation results suggest that the device optimized for various applications can be further optimized at power device.

• Transactions of the Korean Society of Automotive Engineers
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• v.16 no.1
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• pp.71-77
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• 2008

This paper proposes an Electronic Throttle Body (ETB) model considering a non-linearity of DC motor driver which is integrated with a H-bridge and a gate driver. A propagation delay and reverse recovery time of switching components cause non-linear characteristic of DC motor driver. This non-linearity affects not only the amateur voltage of DC motor, but also entire behaviour and parameters of ETB. In order to analyze the behavior of ETB more accurately, this non-linear effect of DC motor driver is modeled. The developed ETB model is validated by use of the step response and ramp response experiments, and it shows relatively accurate results compared with linear DC motor driver model.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.16 no.12
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• pp.2741-2746
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• 2012

In this study, we propose a novel structure based on AlGaN substrate or buffer layer to implement a normally-off mode transistor that was difficult to be realized by conventional AlGaN/GaN heterojunction structures. The channel under the gate can be selectively depleted by growing an upper AlGaN barrier with a higher Al mole fraction and a top GaN charge elimination layer on AlGaN substrate or buffer layer. The proposed AlGaN heterojunction field effect transistor can achieve a threshold voltage of > 2 V, which is generally required in power device specification.

• Proceedings of the KIEE Conference
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• 2001.07b
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• pp.1088-1090
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• 2001

In general, Power SCR(Silicon Controlled Rectifier) is most widely used in Power Plant as well as Industrial field. It has been controlled and operated according to its own control method. Especially, in case of Power plant, it plays a major role in AVR(Automatic Voltage Regulator) or electro chlorination control circuits. Generally, they used in Analog control system at above field. But each SCR current value is different because of load unbalance or switching characteristic variations, it may cause power plant unit trip or system disorder according to SCR element burn out or bad operating condition. Therefore, in this paper a development of 3 phase current balance control unit is described, it gets over the past analog control system limit, uses DSP(Digital signal processor) had high speed response, controls SCR gate firing angle for 3 phase current balance.

• Journal of Magnetics
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• v.19 no.4
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• pp.357-364
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• 2014

This study examined effect of a transcranial magnetic stimulation device with a commercial-frequency approach on the neuronal cell death caused ischemia. For a simple transcranial magnetic stimulation device, the experiment was conducted on an ischemia induced rat by transcranial magnetic stimulation of a commercial-frequency approach, controlling the firing angle using a Triac power device. The transcranial magnetic stimulation device was controlled at a voltage of 220 V 60 Hz and the trigger of the Triac gate was varied from $45^{\circ}$ up to $135^{\circ}$. Cerebral ischemia was caused by ligating the common carotid artery of male SD rats and reperfusion was performed again to blood after 5 minutes. Protein Expression was examined by Western blotting and the immune response cells reacting to the antibodies of Poly ADP ribose polymerase in the cerebral nerve cells. As a result, for the immune response cells of Poly ADP ribose polymerase related to necrosis, the transcranial magnetic stimulation device suppressed necrosis and had a protective effect on nerve cells. The effect was greatest within 12 hours after ischemia. Therefore, it is believed that in the case of brain damage caused by ischemia, the function of brain cells can be restored and the impairment can be improved by the application of transcranial magnetic stimulation.

• Journal of the Korea Institute of Military Science and Technology
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• v.12 no.4
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• pp.446-451
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• 2009

In this paper, we described the design and test results of a high output power amplifier MMIC developed by using 0.5um power pHEMT processes on a 6-inch GaAs wafer for the X-band T/R module application. In the MMIC design, we have used a simple on-chip gate active bias technology to compensate the threshold-voltage variation of pHEMT during the fabrication process and 16-to-1 power combining method to achieve the output power over 10watt. The fabricated chip has an output power over 12watts and maximum PAE of 32% over the frequency range of fo +/-750MHz.

• Journal of Power Electronics
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• v.17 no.1
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• pp.242-252
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• 2017

This paper deals with the blocking of DC-fault current during DC cable short-circuit conditions in HVDC (High-Voltage DC) transmission systems utilizing Modular Multilevel Converters (MMCs), where a new SubModule (SM) topology circuit for the MMC is proposed. In this SM circuit, an additional Insulated-Gate Bipolar Translator (IGBT) is required to be connected at the output terminal of a conventional SM with a half-bridge structure, hereafter referred to as HBSM, where the anti-parallel diodes of additional IGBTs are used to block current from the grid to the DC-link side. Compared with the existing MMCs based on full-bridge (FB) SMs, the hybrid topologies of HBSM and FBSM, and the clamp-double SMs, the proposed topology offers a lower cost and lower power loss while the fault current blocking capability in the DC short-circuit conditions is still provided. The effectiveness of the proposed topology has been validated by simulation results obtained from a 300-kV 300-MW HVDC transmission system and experimental results from a down-scaled HVDC system in the laboratory.