• Journal of Power Electronics
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• v.3 no.1
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• pp.17-23
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• 2003

A new three-phase soft-switching active front-end inverter is presented. The topology consists of a quasi-resonant PWM boost converter with an additional resonant branch, which provides low loss at high frequency operation. This leads to a high conversion efficiency and a remarkable reduction in the siBe of the input inductor. To synchronise the PWM pattern with the resonance cycle, a modified space vector modulation with asymmetrical PWM pattern is used. A high power factor can be achieved for both power flow directions. Due to a new control strategy the converter features a low content of harmonics in the line currents even for distorted line voltages.

• Proceedings of the KIPE Conference
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• 2001.10a
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• pp.146-150
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• 2001

A new three-phase soft-switching active front-end inverter is presented. The topology consists of a quasi-resonant PWM boost converter with an additional resonant branch, which provides low loss at high frequency operation. This leads to a high conversion efficiency and a remarkable reduction in the size of the input inductor. To synchronise the PWM pattern with the resonance cycle, a modified space vector modulation with asymmetrical PWM pattern is used. A high power factor can be achieved for both power flow directions. Due to a new control strategy the converter features a low content of harmonics in the line currents even for distorted line voltages.

• Journal of international Conference on Electrical Machines and Systems
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• v.2 no.2
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• pp.197-201
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• 2013

Cascaded H-bridge multilevel inverter requires independent DC voltage sources to produce multi output voltage levels. When it needs to generate more levels in the output voltage wave, the number of independent DC voltage sources usually limits its extension. To solve this problem, we propose a cascaded H-bridge multilevel inverter employing a front-end flyback converter for unifying input DC voltage sources. After theoretical analysis of the proposed circuit, we verify the validity of the proposed inverter using computer-aided simulations and experiments.

• Proceedings of the KIPE Conference
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• 2018.11a
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• pp.62-64
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• 2018

In two-stage single-phase inverters, inherent double line frequency component is present at both input and output of the front-end converter. Generally large electrolytic capacitors are required to eliminate the ripple. It is well known that the low frequency ripple shortens the lifespan of the capacitor hence the system reliability. However, the ripple can hardly be eliminated without the hardware combined with an energy storage device or a certain control algorithm. In this paper, a novel power-decoupling control method is proposed to eliminate the double line frequency ripple at the front-end converter of the DC/AC power conversion system. The proposed control algorithm is composed of two loop, ripple rejection loop and average voltage control loop and no extra hardware is required. In addition, it does not require any information from the phase-locked-loop (PLL) of the inverter and hence it is independent of the inverter control. In order to prove the validity and feasibility of the proposed algorithm a 5kW Dual Active Bridge DC/DC converter and a single-phase inverter are implemented, and experimental results are presented.

• Journal of Power Electronics
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• v.16 no.1
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• pp.190-204
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• 2016

An active front end (AFE) is required for a three-phase induction motor (IM) fed by a voltage source inverter (VSI), because of the increasing need to derive quality current from the utility end without sacrificing the power factor (PF). This study investigates a proportional-plus-integral (PI) controller based AFE topology that uses a super-lift converter (SLC). The significance of the proposed SLC, which converts rectified AC supply to geometrically proceed ripple-free DC supply, is explained. Variations in several power quality parameters in the intended IM drive for 0% and 100% loading conditions are demonstrated. A simulation is conducted by using MATLAB/Simulink software, and a prototype is built with a field programmable gate array (FPGA) Spartan-6 processor. Simulation results are correlated with the experimental results obtained from a 0.5 HP IM drive prototype with speed feedback and a voltage/frequency (V/f) control strategy. The proposed AFE topology using SLC is suitable for three-phase IM drives, considering the supply end PF, the DC-link voltage and current, the total harmonic distortion (THD) in supply current, and the speed response of IM.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.1
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• pp.45-51
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• 2009

A low-voltage, low-power analog CMOS front-end for a cardiac pacemaker is proposed. The circuits include a 4th order switched-capacitor (SC) filter with a passband of 80-120 Hz and a SC variable gain amplifier whose control range is from 0 to 24-dB with 0.094 dB step. An inverter-based switched-capacitor circuit technique is used for low-voltage operation and ultra-low power consumption, and correlated double sampling technique is used for reducing the finite gain effect of an inverter. The proposed circuit has been designed in a $0.35-{\mu}m$ CMOS process, and it achieves 80-dB SFDR at 5-kHz sampling frequency. The power consumption is only 330 nW at 1-V power supply.

• Journal of Power Electronics
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• v.18 no.5
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• pp.1567-1576
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• 2018

The reliability of grid-connected inverters can be improved by algorithms capable of diagnosing faults in LCL filters. A fault diagnostic method during inverter startup is proposed. The proposed method can accurately generate and monitor information on the peak value and the location of the peak frequency component of the step response of a damped LCL filter. To identify faults, the proposed method compares the evaluated response with the response of a healthy higher-order damped LCL filter. The frequency components in the filter voltage response are first analytically obtained in closed form, which yields the expected trends for the filter faults. In the converter controller, the frequency components in the filter voltage response are computed using an appropriately designed fast Fourier transform and compared with healthy LCL response parameters using a finite state machine, which is used to sequence the proposed startup diagnostics. The performance of the proposed method is validated by comparing analytical results with the simulation and experimental results for a three-phase grid-connected inverter with a damped LCL filter.

• Journal of information and communication convergence engineering
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• v.4 no.4
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• pp.170-173
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• 2006

Recently, with increasing efficiency of DSC (photo-electrochemical using a nano-particle), The Performance of DSC solar generation system also needs improvement. The approach consists of a Fly-back DC-DC (transfer ratio 1:10) converter to boost the DSC cell voltage to 300VDC. The four switch (MOSFET) inverter is employed to produce 220V, 60Hz AC outputs. High performance, easy manufacturability, lower component count., safety and cost are addressed. Protection and diagnostic features form an important part of the design. Another highlight of the proposed design is the control strategy, which allows the inverter to adapt to the: requirements of the load as well as the power source. A unique aspect of the design is the use of the DSP TMS320LF2406 to control the inverter by current and voltage feed-back. Efficient and smooth control of the: power drawn from the DSC Cell is achieved by controlling the front end DC-DC converter in current mode.

• Journal of Power Electronics
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• v.12 no.2
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• pp.276-284
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• 2012

AC/AC power conversion is widely used to feed AC loads with a variable voltage and/or a variable frequency from a constant voltage constant frequency power grid or to connect critical loads to an unreliable power supply while delivering a very balanced and accurate sinusoidal voltage system of constant amplitude and frequency. The load specifications will clearly impose the requirements for the inverter stage of the power converter, while wider ranges of choices are available for the rectifier. This paper investigates the utilization of a buck-type current source rectifier as the active front-end stage of an AC/AC converter for applications that require an adjustable DC-link voltage as well as elimination of the low-frequency common mode voltage. The proposed solution is to utilize a combination of two or more zero current vectors in the Space Vector Modulation (SVM) technique for Current Sources Rectifiers (CSR).

• Journal of Power Electronics
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• v.15 no.2
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• pp.299-308
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• 2015

This study proposes four novel pulse width modulation (PWM) shoot-through control methods for impedance source (IS) galvanically isolated DC-DC converters. These methods are derived from a PWM control method with shifted shoot-through introduced by the authors in 2012. In contrast to the baseline solution, where the shoot-through states are generated by the simultaneous conduction of all transistors in the inverter bridge, our new approach is based on the shoot-through generation by one inverter leg. The idea is to increase the number of soft-switched transients and, therefore, decrease the dynamic losses of the front-end inverter. All the proposed approaches are experimentally verified through an insulated-gate bipolar transistor-based IS DC-DC converter. Conclusions are drawn in accordance with the results of the switching loss analysis.