• Proceedings of the KIPE Conference
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• 1999.07a
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• pp.614-617
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• 1999

To achieve high efficiency in high power and high frequency applications, reduction of switching losses and noise is very important. In this paper, an improved zero voltage switching forward dc/dc converter is proposed. The proposed converter is constructed by using energy recovery snubbers in parallel with the main switches and output diodes of the conventional forward dc/dc converter. Due to the use of the energy recovery snubbers in the primary and secondary side, the proposed converter achieves zero-voltage-switching turn-off without switching losses for switching devices and output rectification diodes. The complete operating principles and experimental results will be presented.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.14 no.1
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• pp.37-42
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• 2021

This paper presents a jitter and phase noise characteristic improved phase-locked loop (PLL) with loop filter voltage detector(LFVD) and frequency voltage converter(FVC). Loop filter output voltage variation is determined through a circuit made of resistor and capacitor. The output signal of a small RC time constant circuit is almost the same as to loop filter output voltage. The output signal of a large RC time constant circuit is the average value of loop filter output voltage and becomes a reference voltage to the added LFVD. The LFVD output controls the current magnitude of sub-charge pump. When the loop filter output voltage increases, LFVD decreases the loop filter output voltage. When the loop filter output voltage decreases, LFVD increases the loop filter output voltage. In addition, FVC also improves the phase noise characteristic by reducing the loop filter output voltage variation. The proposed PLL with LFVD and FVC is designed in a 0.18um CMOS process with 1.8V power voltage. Simulation results show 0.854ps jitter and 30㎲ locking time.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.16 no.12
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• pp.2716-2724
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• 2012

In this paper, a Phase Difference-to-Voltage Converter (PDVC) has been introduced into a conventional fractional-N PLL to suppress fractional spurs. The PDVC controls charge pump current depending on the phase difference of two input signals to phase frequency detector. The charge pump current decreases as the phase difference of two input signals increase. It results in the reduction of fractional spurs in the proposed fractional-N PLL. The proposed fractional-N PLL with PDVC has been designed based on a 1.8V $0.18{\mu}m$ CMOS process and proved by HSPICE simulation.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.22 no.7
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• pp.555-558
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• 2009

This paper presents a step-down converter IC for automotive applications. This device was designed for a 40 V/1 A high-power output for voltage reference of automotive IC. It provides 250kHz PWM (pulse width modulation) and PFM(pulse frequency modulation) according to load conditions. This device was simulated spectre of IC-design-tools and fabricated Dong-bu Hitec 0.35um BD350BA process.

• Proceedings of the KIEE Conference
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• 1999.07f
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• pp.2518-2521
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• 1999

A Full-bridge zero-voltage zero-current switching (ZVZCS) converter using transformer auxiliary winding is analyzed. A complete small-signal model for the control scheme is developed. The propoed model is accurate up to half the switching frequency. The dynamic characteristics are compared with those of the zero-voltage switching converter and buck converter. Model predictions are confirmed by experimental measurements.

• Proceedings of the KIEE Conference
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• 1999.07f
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• pp.2515-2517
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• 1999

In this paper we analysis DC bus voltage stress at high line voltage and light load in $S^4$-PFC Isolated AC/DC converter with DC bus voltage feedback using coupling in transformer. In this converter, the principle of operation and the practical problems in the design are considered. Simulation and experimental results are presented to verify the operation and performance of the $S^4$-PFC converter with DC bus voltage feedback. Experimental sets are performed in the conditions; switching frequency 100 kHz, output of 5 V, 60W, and universal line input voltage.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.6
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• pp.1-9
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• 2008

This paper suggests the triple-mode CMOS DC-DC converter that has temperature/voltage variation compensation techniques. The proposed triple-mode CMOS DC-DC converter is used to generate constant or variable voltages of 0.6-2.2V within battery source range of 3.3-5.5V. Also, it supports triple modes, which include Pulse Width Modulator (PWM) mode, Pulse Frequency Modulator (PFM) mode and Low Drop-Out (LDO) mode. Moreover, it uses 1MHz low-power CMOS ring oscillator that will compensate malfunction of chip in temperature/voltage variation condition. The proposed triple-mode CMOS DC-DC converter, which generates output voltages of 0.6-2.2V with an input voltage sources of 3.3-5.5V, exhibits the maximum output ripple voltage of below 10mV at PWM mode, 15mV at PFM mode and 4mV at LDO mode. And the proposed converter has maximum efficiency of 93% at PWM mode. Even at $-25{\sim}80^{\circ}C$ temperature variations, it has kept the output voltage level within 0.8% at PWM/PFM/LDO modes. For the verification of proposed triple-mode CMOS DC-DC converter, the simulations are carried out with $0.35{\mu}m$ CMOS technology and chip test is carried out.

• Journal of Power Electronics
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• v.10 no.1
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• pp.27-33
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• 2010

This paper presents a bidirectional DC-DC converter suitable for low-voltage super capacitor-based electric energy storage systems. The DC-DC converter presented here consists of a full-bridge circuit and a current-fed push-pull circuit with a high frequency (HF) transformer-link. In order to reduce the device-conduction losses due to the large current of the super capacitor as well as unnecessary ringing, synchronous rectification is employed in the super capacitor-charging mode. A wide range of voltage regulation between the battery and the super capacitor can be realized by employing a Phase-Shifting (PS) Pulse Width Modulation (PWM) scheme in the full-bridge circuit for the super capacitor charging mode as well as the overlapping PWM scheme of the gate signals to the active power devices in the push-pull circuit for the super capacitor discharging mode. Essential performance of the bidirectional DC-DC converter is demonstrated with simulation and experiment results, and the practical effectiveness of the DC-DC converter is discussed.

• Journal of Sensor Science and Technology
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• v.11 no.3
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• pp.145-154
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• 2002

NiCr-heaters with three different thicknesses ranging from 400 nm to 800 nm were fabricated and their characteristics were compared for the purpose of developing a chromel-alumel multijunction thermal converter for low input voltage with low frequency. The thermoelectric effect-induced AC-DC voltage transfer difference of the thermal converter with a built-in NiCr-heater of 400 nm-thickness was ${\pm}0.51{\sim}1.69\;ppm$ in the DC reversing frequency of $40\;Hz{\sim}10\;kHz$ with appling $0.5\;V_{rms}$ and the difference was increased to ${\pm}40{\sim}{\pm}115\;ppm$ in the frequency of $40\;Hz{\sim}1\;MHz$, when both thermoelectric effects and frequency effects were considered, showing the thermal converter would be suitable for the low input voltage application with low frequency.

• Journal of Power Electronics
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• v.4 no.1
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• pp.56-63
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• 2004

A new driving circuit for the SPSS (Single-Pulse Soft-Switching) PFC converter is proposed. The switching device of a SPSS converter switches once in every half cycle of an AC commercial power source. Therefore, it can be solved many problems caused by the high frequency operation. The proposed SPSS converter achieves the soft-switching operation and the EMI noise can be reduced. The resonant capacitor voltage supplies to the resonant inductor even if the input AC voltage is the vicinity of zero cross voltage. Then, the power factor and input current waveform can be improved without delay time. A new driving circuit achieves the operation of SPSS converter by one switching drive circuit. The proposed converter can be satisfied the IEC standard sufficiently