• Title/Summary/Keyword: external program voltage

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Design of a redundancy control circuit for 1T-SRAM repair using electrical fuse programming (전기적 퓨즈 프로그래밍을 이용한 1T-SRAM 리페어용 리던던시 제어 회로 설계)

  • Lee, Jae-Hyung;Jeon, Hwang-Gon;Kim, Kwang-Il;Kim, Ki-Jong;Yu, Yi-Ning;Ha, Pan-Bong;Kim, Young-Hee
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.14 no.8
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    • pp.1877-1886
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    • 2010
  • In this paper, we design a redundancy control circuit for 1T-SRAM repair using electrical fuse programming. We propose a dual port eFuse cell to provide high program power to the eFuse and to reduce the read current of the cell by using an external program supply voltage when the supply power is low. The proposed dual port eFuse cell is designed to store its programmed datum into a D-latch automatically in the power-on read mode. The layout area of an address comparison circuit which compares a memory repair address with a memory access address is reduced approximately 19% by using dynamic pseudo NMOS logic instead of CMOS logic. Also, the layout size of the designed redundancy control circuit for 1T-SRAM repair using electrical fuse programming with Dongbu HiTek's $0.11{\mu}m$ mixed signal process is $249.02 {\times}225.04{\mu}m^{2}$.

A Study on the Utilization of Metal Oxide Varistor for Low-Voltage AC Circuits (저압 AC회로의 MOV 적용방안 연구)

  • Choi, Hyo-Yul;Lee, Won-Bin;Kang, Young-Suk;Lee, Jae-Bok
    • Proceedings of the KIEE Conference
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    • 1996.07c
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    • pp.1822-1824
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    • 1996
  • Damage and upset of control and communication equipment due to transient overvoltages which occur due primarily to internal switching surge and external lightning surge are an important problems in electromagnetic compatibility(EMC). In this paper, we analyzed operation characteristic of metal oxide varistor widely used low voltage AC line using the electromagnetic transients program(EMTP) and compare it with experimental results and also, we modeled combination generator producing $1.2/50{\mu}s$ open circuit voltage and $8/20{\mu}s$ short circuit current as a source which is critical in calculating operation characteristic. Simulation results showed that most of Transient energy consumes at MOV located in service entrance side than load side, and it showed similar to experimental results. Therefore, entrance side MOV should be selected more energy capacity than that of load side MOV.

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Vortex Dynamics of Superconducting Flux Flow Transistor in a Channel (채널부분의 초전도 자속 흐름 트랜지스터 볼텍스 동력학)

  • Ko, Seok-Cheol;Kang, Hyeong-Gon;Lim, Sung-Hun;Lee, Jong-Hwa;Han, Byoung-Sung
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2003.07a
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    • pp.546-549
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    • 2003
  • The principle of the superconducting vortex flow transistor (SVFT) is based on control of the Abrikosov vortex flowing along a channel. The induced voltage is controlled by a bias current and a control current, instead of external magnetic field. The device is composed of parallel weak links with a nearby current control line. We explained the process to get an I-V characteristic equation and described the method to induce the external and internal magnetic field by the Biot-Savarts law in this paper. The equation can be used to predict the I-V curves for fabricated device. From the equation we demonstrated that the current-voltage characteristics were changed with input parameters. I-V characteristics were simulated to analyze a SVFT with multi-channel by a Matlab program.

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Design of Synchronous 256-bit OTP Memory (동기식 256-bit OTP 메모리 설계)

  • Li, Long-Zhen;Kim, Tae-Hoon;Shim, Oe-Yong;Park, Mu-Hun;Ha, Pan-Bong;Kim, Young-Hee
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.12 no.7
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    • pp.1227-1234
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    • 2008
  • In this paper is designed a 256-bit synchronous OTP(one-time programmable) memory required in application fields such as automobile appliance power ICs, display ICs, and CMOS image sensors. A 256-bit synchronous memory cell consists of NMOS capacitor as antifuse and access transistor without a high-voltage blocking transistor. A gate bias voltage circuit for the additional blocking transistor is removed since logic supply voltage VDD(=1.5V) and external program voltage VPPE(=5.5V) are used instead of conventional three supply voltages. And loading current of cell to be programmed increases according to RON(on resistance) of the antifuse and process variation in case of the voltage driving without current constraint in programming. Therefore, there is a problem that program voltage can be increased relatively due to resistive voltage drop on supply voltage VPP. And so loading current can be made to flow constantly by using the current driving method instead of the voltage driving counterpart in programming. Therefore, program voltage VPP can be lowered from 5.9V to 5.5V when measurement is done on the manufactured wafer. And the sens amplifier circuit is simplified by using the sens amplifier of clocked inverter type instead of the conventional current sent amplifier. The synchronous OTP of 256 bits is designed with Magnachip $0.13{\mu}m$ CMOS process. The layout area if $298.4{\times}314{\mu}m2$.

A Modelling and Analysis of SSSC and UPFC in Static Analysis of Power Systems (IPLAN을 사용한 SSSC와 UPFC의 모델링과 정태해석에 미치는 영향 분석)

  • 김덕영;조언중;이군재;이지열
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.15 no.6
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    • pp.15-19
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    • 2001
  • This paper presents an modelling and analysis of SSSC and UPFC in static analysis of power systems. SSSC is used to control active power flow in transmission lines by controlling the phase angle of the injected voltage source which is in rectangular to the line current. UPEC is used to control the magnitude and phase of the injected voltage sources which are connected both in series and in parallel with the transmission line to control power flow and bus voltage. To compare the effect of SSSC and UPFC in power system static analysis, the PSS/E simulation program is used. As the FACTS device model such as SSSC and UPFC is not provided in PSS/E yet, an equivalent load model is used. This procedure is implemented by IPLAN which is an external macro program of PSS/E. The simulation results show that UPFC is more effective to improve bus voltage than SSSC in power system static analysis.

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Electromyographic Activity of the Biceps Brachii Muscle in Shoulders With Anterior Instability (전방 불안정성 견관절에서 이두박근의 근전도 활동성)

  • Kim Seung-Ho;Ha Kwon-Ick;Kim Hyeon-Sook;Kim Seon-Woo;Park Jong Hyuk;Kim Young-Min
    • Clinics in Shoulder and Elbow
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    • v.3 no.2
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    • pp.87-94
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    • 2000
  • Purpose : The purpose of this study was to evaluate the activity of the biceps brachii muscle in the vulnerable abduction and external rotation position of the shoulder in patients with anterior instability. Materials and Methods: This experimental study include a prospective analysis of the electromyographic(EMG) data on a group of patients with traumatic unilateral anterior instability of the shoulder. The EMG data of unstable shoulders was compared with those of opposite shoulders as control. The optimal sample size for the case-control study was calculated using an nQuery Advisor program(nQuery Adviser 3.0, Statisticl solutions Ltd., Ireland). The EMG analyses were conducted in 76 shoulders in 38 patients who had a traumatic anterior instability in one shoulder. The EMG records were obtained at different position of shoulder, which included 0° , 45° , 90° and 120° of shoulder abduction. In each angle of shoulder abduction, the arms were placed in an external rotation as tolerated by the anterior apprehension. The paired-sample T test was used to compare the difference of the root mean square(RMS) voltages between the stable and unstable shoulders in each degree of arm position. Results : The RMS voltage of the biceps muscle was significantly greater in the unstable shoulder than opposite stable shoulder in all position of the arm(p<0.001). The RMS voltage of the biceps was maximal at 90° and 120° of external rotation in the unstable shoulder(p<0.05). The RMS voltage of the supraspinatus muscle revealed no differences in any of the test conditions(p=0.904, 0.506, 0.119 and 0.781 in 0° , 45° , 90° and 120° , respectively) Conclusion: In the vulnerable abduction and external rotation position, the biceps muscle plays an active compensatory role in the unstable shoulder while not in the stable shoulder.

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Power Loss Modeling of Individual IGBT and Advanced Voltage Balancing Scheme for MMC in VSC-HVDC System

  • Son, Gum Tae;Lee, Soo Hyoung;Park, Jung-Wook
    • Journal of Electrical Engineering and Technology
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    • v.9 no.5
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    • pp.1471-1481
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    • 2014
  • This paper presents the new power dissipation model of individual switching device in a high-level modular multilevel converter (MMC), which can be mostly used in voltage sourced converter (VSC) based high-voltage direct current (HVDC) system and flexible AC transmission system (FACTS). Also, the voltage balancing method based on sorting algorithm is newly proposed to advance the MMC functionalities by effectively adjusting switching variations of the sub-module (SM). The proposed power dissipation model does not fully calculate the average power dissipation for numerous switching devices in an arm module. Instead, it estimates the power dissipation of every switching element based on the inherent operational principle of SM in MMC. In other words, the power dissipation is computed in every single switching event by using the polynomial curve fitting model with minimum computational efforts and high accuracy, which are required to manage the large number of SMs. After estimating the value of power dissipation, the thermal condition of every switching element is considered in the case of external disturbance. Then, the arm modeling for high-level MMC and its control scheme is implemented with the electromagnetic transient simulation program. Finally, the case study for applying to the MMC based HVDC system is carried out to select the appropriate insulated-gate bipolar transistor (IGBT) module in a steady-state, as well as to estimate the proper thermal condition of every switching element in a transient state.

Design of a Logic eFuse OTP Memory IP (Logic eFuse OTP 메모리 IP 설계)

  • Ren, Yongxu;Ha, Pan-bong;Kim, Young-Hee
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.20 no.2
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    • pp.317-326
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    • 2016
  • In this paper, a logic eFuse (electrical Fuse) OTP (One-Time Programmable) memory IP (Intellectual Property) using only logic transistors to reduce the development cost and period of OTP memory IPs is designed. To secure the reliability of other IPs than the OTP memory IP, a higher voltage of 2,4V than VDD (=1.5V) is supplied to only eFuse links of eFuse OTP memory cells directly through an external pad FSOURCE coming from test equipment in testing wafers. Also, an eFuse OTP memory cell of which power is supplied through FSOURCE and hence the program power is increased in a two-dimensional memory array of 128 rows by 8 columns being also able to make the decoding logic implemented in small area. The layout size of the designed 1kb eFuse OTP memory IP with the Dongbu HiTek's 110nm CIS process is $295.595{\mu}m{\times}455.873{\mu}m$ ($=0.134mm^2$).

The Development of wide frequency analyzing system by partial electric discharge electromagnetic-wave Receiver (부분방전 전자파 측정용 광대역 주파수 분석 시스템 개발)

  • Park, Doo-Yong;Shin, Young-Jin
    • Proceedings of the KIEE Conference
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    • 2004.11c
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    • pp.547-549
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    • 2004
  • This system is monitors the degree of aging happened at the electric machine. It detects electromagnetic wave generated from the insulator when the voltage is applied to the machine. By analyzing the internal and external factors make the electric, mechanic, or thermal characteristics of the electric machinery deteriorate the electric insulation and eventually cause the partial electric discharge. The continuous partial electric charge accelerates the insulation aging and the insulation breakdown happens at last. This system consists of the relays connected with 10 sensors (40 total) detecting the partial electric discharge ans the temperature, the server, ans the program analyzing and storing the data.

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Shape Estimation for the Control of Composite Smart Sstructure Using Piezoceramics (복합재료 지능구조물의 제어를 위한 압전소자를 이용한 변형형상예측)

  • Ha, Seong-Gyu;Jo, Yeong-Su
    • Transactions of the Korean Society of Mechanical Engineers A
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    • v.20 no.4
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    • pp.1133-1145
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    • 1996
  • A method is proposed to predict the deformed shape of the structure subjected to the unknown external loads using the signal from the piezoceramic sensors. Such a shape estimation is based on the linear relationship between the deformation of structure and the signal from sensor, which is calculated using finite element method. The deformed shape is, then calculated using the linear matrix and the signals from the piezoceramic sensors attached to the structures. For the purpose, a structural analysis program is developed using a multi-layerd finite element of 8 nodes with 3 displacement and one voltage degrees of freedom at each node. The multiple layers with the different material properties can be layered within the element. The incompatible mode with the element is found to be crucial to catch the bending behavior accurately. The accuracy of the program is, then, verified by being compared with the experimental results performed by Crawley. The proposed shape estimation method is also verified for the different loads and sensor size. It is shown that the results of shape estimation method using the linear matrix well predicts the deflections compared with those of finite element method.