• Nuclear Engineering and Technology
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• v.48 no.6
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• pp.1321-1329
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• 2016

To get an insight into the operating characteristics of the passive residual heat removal system of molten salt reactors, a two-phase natural circulation test facility was constructed. The system consists of a boiling loop absorbing the heat from the drain tank, a condensing loop consuming the heat, and a steam drum. A steady-state experiment was carried out, in which the thimble temperature ranged from $450^{\circ}C$ to $700^{\circ}C$ and the system pressure was controlled at levels below 150 kPa. When reaching a steady state, the system was operated under saturated conditions. Some important parameters, including heat power, system resistance, and water level in the steam drum and water tank were investigated. The experimental results showed that the natural circulation system is feasible in removing the decay heat, even though some fluctuations may occur in the operation. The uneven temperature distribution in the water tank may be inevitable because convection occurs on the outside of the condensing tube besides boiling with decreasing the decay power. The instabilities in the natural circulation loop are sensitive to heat flux and system resistance rather than the water level in the steam drum and water tank. RELAP5 code shows reasonable results compared with experimental data.

• Journal of Biosystems Engineering
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• v.1 no.1
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• pp.1-6
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• 1976

This paper is the third one of the study on balanced type oscillating mole-drainer, the first one was presented in No 9. Gyeongsang College Report and the second one in Vol. 17, No.4 of the KSAE. In the first part of this study, the characteristics of traction forces between the nonoscillating earth working equipments and oscillating ones was compared. A model of the balanced type oscillating mole-drainer, which composed of a mechanism that may reduce the machine vibration, was designed following the dimensional analysis and similitude technique. The model test was carried out to clarify the balancing mechanism of the oscillating parts and other parts of the machine. In the light of the results from the model tests, a prototype machine was made for experimental purpose. Results from the field test by a reported in the near future. In the second report, the model tests were carried out under the same soil conditions, i.e, . oscillating frequency, running velocity, and oscillating amplitude, etc. It was clear that use of balanced type oscillating model could substantially reduce the vibration of the whole system of the machine, when compared with the nonoscillating type model. In this paper(the third report), results of investigation on the traction force, power requirement, and moment. etc, is presented. Analysis of variance technique was used for analyzing the effect of the frequency, amplitude, and running velocity on the draft force, torque, power requirements, and moments. The results obtained from the model tests are as follows, 1) By practicing a balanced-type oscillating mole-drainer, it was possible to reduce the traction resistance by 55.1-61. 2 percent of traction resistance, however, was 1.75 - 1.95 times greater than the value of resistance which was induced by use of a mole-drainer with single bullet. The resistance of rear shank against soil was considered as a main causing factor of the above results. 2) As the oscillation frequency was increased, the traction resistance was decreased. Considering on the effect of oscillation the greater the amplitude, and the slower the running velocity was, the greater the reduction ratio of traction resistance was. 3) The ratio of the traction resistance of oscillating mole-drainer to that of non-oscillating one could be represented as a function of dimensionless variable (V/$Af$). The results from the tests were well agreed with the reported results from the experim ents on oscillation plow or hoe. 4) By taking a lower value of (V/$Af$), reducing the traction resistance was possible. This fact meant, however, that the efficiency of mole drain practice would be lower. 5) It was experimentally confirmed under the same condition of soil that the variable (R/$rD1^3$) could be represented as a function of a variable($V^2/gD$) when a non\ulcornerocillating mole-drainer was used. 6) When a oscillating mole-drainer was used, the variable(R/$rD_1^{3}$) could be represented as a function of two variables ($v^2/gD_1$) and (V^2/gD_1$). 7) The torque was not affected by a change of frequency. However, a relation of proportionality existed between torque and amplitude, running velocity, and ratio of bullet diameter. When a balanced type oscillating mole-drainer with two bullets was used, torque was increased by 52.8-78. 4 percent and total power requirement was also increased. 8) Total power requirement was increased linearly in accordance with the increasing frequency, 41.96 percent of total power was used for oscillating action. The magnitude of total power requirement was 1. 8-9. 4 times greater than that of a non-oscillating mechanism. In the view point of power requirement, it was not advisable to increase the frequency, amplitude, running velocity, and ratio of bullet diameter at the same time. 9) Only the positive moment occured in the rear shank. Change of the diameter of a rear bullet, could not affect the balancing against the soil resistance. It was necessary for rear bullet to have a large resistance against soil only when the rear bullet was in backward motion. 10) Within an extent of the experimental base, optimum limits for several design factors were A=0.5cm, $f$=22.5Hz, V=O. 05m/sec, and $\lambda$=1.0 By adapting these values traction resistance was reduced by 40 percent and vibration acceleration wa s reduced by 60 percent. Even though the total , power requirements for operating a balanced type oscillation mechanism was greater ~than that of non-oscillating one, using a oscillating mechanism would be more effective. Because a balanced type oscillating mechanism is used, tractive resistance will be reduced and then the lighter . tractive equipment could be used.

• Journal of electromagnetic engineering and science
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• v.3 no.2
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• pp.118-125
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• 2003

This paper presents a 5.8-㎓ oscillator that uses a novel defected ground structure(DGS), which is etched on the metallic ground plane. As the suggested defected ground structure is the structure for mounting an active device, it is the roles of a feedback loop inducing a negative resistance as well as a frequency-selective circuit. Applying the feedback loop between the drain and the gate of a FET device produces precise phase conversion in the feedback loop. The equivalent circuit parameters of the DGS are extracted by using a three-dimensional EM simulation ,md simple circuit analysis method. In order to demonstrate a new DGS oscillator, we designed the oscillator at 5.8-㎓. The experimental results show 4.17 ㏈m output power with over 22 % dc-to-RF power efficiency and - 85.8 ㏈c/Hz phase noise at 100 KHz offset from the fundamental carrier at 5.81 ㎓.

• ETRI Journal
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• v.34 no.6
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• pp.950-953
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• 2012

Schottky barrier single electron transistors (SB-SETs) and Schottky barrier single hole transistors (SB-SHTs) are fabricated on a 20-nm thin silicon-on-insulator substrate incorporating e-beam lithography and a conventional CMOS process technique. Erbium- and platinum-silicide are used as the source and drain material for the SB-SET and SB-SHT, respectively. The manufactured SB-SET and SB-SHT show typical transistor behavior at room temperature with a high drive current of $550{\mu}A/{\mu}m$ and $-376{\mu}A/{\mu}m$, respectively. At 7 K, these devices show SET and SHT characteristics. For the SB-SHT case, the oscillation period is 0.22 V, and the estimated quantum dot size is 16.8 nm. The transconductance is $0.05{\mu}S$ and $1.2{\mu}S$ for the SB-SET and SB-SHT, respectively. In the SB-SET and SB-SHT, a high transconductance can be easily achieved as the silicided electrode eliminates a parasitic resistance. Moreover, the SB-SET and SB-SHT can be operated as a conventional field-effect transistor (FET) and SET/SHT depending on the bias conditions, which is very promising for SET/FET hybrid applications. This work is the first report on the successful operations of SET/SHT in Schottky barrier devices.

• Journal of the Microelectronics and Packaging Society
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• v.24 no.4
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• pp.91-95
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• 2017

Package-On-Package (PoP) technology is developing toward smaller form factors with high-speed data transfer capabilities to cope with high DDR4x memory capacity. The common application processor (AP) used for PoP devices in smartphones has the bottom package as logic and the top package as memory, which requires both thermally and electrically enhanced functions. Therefore, it is imperative that PoP designs consider both thermal and power distribution network (PDN) issues. Stacked packages have poorer thermal dissipation than single packages. Since the bottom package usually has higher power consumption than the top package, the bottom package impacts the thermal budget of the top package (memory). This paper investigates the thermal and electrical characteristics of PoP designs, particularly the bottom package. Findings include that via and dense via-cluster volume have an important role to lower thermal resistance to the motherboard, which can be an effective way to manage chip hot spots and reduce the thermal impact on the memory package. A Cu block and dense via-cluster layout with an optimal location are proposed to drain the heat from the chip hot spots to motherboard which will enhance thermal and electrical performance at the design stage. The analytical thermal results can be used for design guidelines in 3D packaging.

• JSTS:Journal of Semiconductor Technology and Science
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• v.14 no.5
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• pp.682-687
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• 2014

We have performed reverse gate bias stress tests on AlGaN/GaN-on-Si Heterostructure FETs (HFETs). The shift of threshold voltage ($V_{th}$) and the reduction of on-current were observed from the stressed devices. These changes of the device parameters were not permanent. We investigated the temporary behavior of the stressed devices by analyzing the temperature dependence of the instabilities and TCAD simulation. As the baseline temperature of the electrical stress tests increased, the changes of the $V_{th}$ and the on-current were decreased. The on-current reduction was caused by the positive shift of the $V_{th}$ and the increased resistance of the gate-to-source and the gate-to-drain access region. Our experimental results suggest that electron-trapping effect into the shallow traps in devices is the main cause of observed instabilities.

• 한국정보디스플레이학회:학술대회논문집
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• 2004.08a
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• pp.305-308
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• 2004

We present a novel process for the ultra low temperature (<150$^{\circ}C$) polycrystalline silicon (ULTPS) TFT for the flexible display applications on the plastic substrate. The sequential lateral solidification (SLS) was used for the crystallization of the amorphous silicon film deposited by rf magnetron sputtering, resulting in high mobility polycrystalline silicon (poly-Si) film. The gate dielectric was composed of thin $SiO_2$ formed by plasma oxidation and $Al_2O_3$ deposited by plasma enhanced atomic layer deposition. The breakdown field of gate dielectric on poly-Si film showed above 6.3 MV/cm. Laser activation reduced the source/drain resistance below 200 ${\Omega}$/ㅁ for n layer and 400 ${\Omega}$/ㅁ for p layer. The fabricated ULTPS TFT shows excellent performance with mobilities of 114 $cm^2$/Vs (nMOS) and 42 $cm^2$/Vs (pMOS), on/off current ratios of 4.20${\times}10^6$ (nMOS) and 5.7${\times}10^5$ (PMOS).

• Proceedings of the Materials Research Society of Korea Conference
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• 2009.11a
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• pp.26.1-26.1
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• 2009

A simple route of external mechanical force is presented for enhancing the electrical properties of polymer nanocomposite consisted of nanowires. By dispersing ZnO nanowires in polymer solution and drop casting on substrates, nanocomposite transistors containing ZnO nanowires are successfully fabricated. Even though the ZnO nanowires density is properly controlled for device fabrication, as-cast device doesn't show any detectable currents, because nanowires are separated far from each other with the insulating polymer matrix intervening between them. Compared to the device pressed at 300 kPa, the device pressed at 600 kPa currents increased by 50times showing the linear behavior against drain voltage and exhibits promising electrical properties, which operates in the depletion mode with higher mobility and on-current. Such an improved device performance would be realized by the contacts improvement and the increase of the number of electrical path induced by external force. This approach provides a viable solution for serious contact resistance problem of nanocomposite materials and promises for future manufacturing of high-performance devices.

• Proceedings of the KIEE Conference
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• 1991.11a
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• pp.286-289
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• 1991

We simulated ion implantation and annealing condition of 1 ${\mu}m$ CMOS device using process simulator, SUPREM-II. In this simulation, optimal condition of ion implantation for symmetric threshold voltage determination of PMOS and NMOS region, junction depth and sheet resistance of source/drain region, impurity profile of each region are investigated. Ion implantation dose for 3 ${\mu}m$ N-well junction depth and symmetric threshold voltage of $|0.6|{\pm}0.1$ V were $1.9E12Cm^{-2}$(for phosphorus), $1.7E122Cm^{-2}$(for boron) respectively. Also annealing condition for dopant activation are examined about $900^{\circ}C$, 30 minutes. After final process step, N-well junction, P+ S/D junction and N+ S/D junction depth are calculated 3.16 ${\mu}m$, 0.45 ${\mu}m$ and 0.25 ${\mu}m$ respectively.

• Proceedings of the KIEE Conference
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• 1998.11c
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• pp.735-736
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• 1998

Reduction of hot carrier degradation in MOS devices has been one of the most serious concerns for MOS-ULSIs. In this paper, three types of LDD structure for suppression of hot carrier degradation, such as spacer-induced degradation and decrease of performance due to increase of series resistance will be investigated. LDD-nMOSFETs used in this study had three different drain structure. (1) conventional ${\underline{S}}urface$ type ${\underline{L}}DD$(SL), (2) ${\underline{B}}uried$ type ${\underline{L}}DD$(BL), (3) ${\underline{S}}urface$urface ${\underline{I}}mplantation$ type LDD(SI). As a result, the surface implantation type LDD structure showed that improved hot carrier lifetime to comparison with conventional surface and buried type LDD structure.