• Proceedings of the Korean Vacuum Society Conference
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• 2013.02a
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• pp.319-319
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• 2013

Even though the fabrication methods of metal oxide based thin film capacitor have been well established such as RF sputtering, Sol-gel, metal organic chemical vapor deposition (MOCVD), ion beam assisted deposition (IBAD) and pulsed laser deposition (PLD), an applicable capacitor of printed circuit board (PCB) has not realized yet by these methods. Barium Strontium Titanate (BST) and other high-k ceramic oxides are important materials used in integrated passive devices, multi-chip modules (MCM), high-density interconnect, and chip-scale packaging. Thin film multi-layer technology is strongly demanded for having high capacitance (120 nF/$mm^2$). In this study, we suggest novel multi-layer thin film capacitor design and fabrication technology utilized by plasma assisted deposition and photolithography processes. Ba0.6Sr0.4TiO3 (BST) was used for the dielectric material since it has high dielectric constant and low dielectric loss. 5-layered BST and Pt thin films with multi-layer sandwich structures were formed on Pt/Ti/$SiO_2$/Si substrate by RF-magnetron sputtering and DC-sputtering. Pt electrodes and BST layers were patterned to reveal internal electrodes by photolithography. SiO2 passivation layer was deposited by plasma-enhanced chemical vapor deposition (PE-CVD). The passivation layer plays an important role to prevent short connection between the electrodes. It was patterned to create holes for the connection between internal electrodes and external electrodes by reactive-ion etching (RIE). External contact pads were formed by Pt electrodes. The microstructure and dielectric characteristics of the capacitors were investigated by scanning electron microscopy (SEM) and impedance analyzer, respectively. In conclusion, the 0402 sized thin film multi-layer capacitors have been demonstrated, which have capacitance of 10 nF. They are expected to be used for decoupling purpose and have been fabricated with high yield.

• Proceedings of the Korean Vacuum Society Conference
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• 2016.02a
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• pp.318.1-318.1
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• 2016

Hafnium Oxide (HfOx) has been attracted as a promising gate dielectric for replacing SiO2 in gate stack applications. In this paper, Metal-Oxide-Semiconductor (MOS) capacitor with solution processed HfO2 high-k material as a dielectric were fabricated. The solvent using $HfOCl2{\cdot}8H2O$ dissolve in 2-Methoxy ethanol was prepared at 0.3M. The HfOx layers were deposited on p-type silicon substrate by spin-coating at $250^{\circ}C$ for 5 minutes on a hot plate and repeated the same cycle for 5 times, followed by annealing process at 350, 450 and $550^{\circ}C$ for 2 hours. When the annealing temperature was increased from 350 to $550^{\circ}C$, capacitance value was increased from 337 to 367 pF. That was resulted from the higher temperature of HfOx which have more crystallization phase, therefore dielectric constant (k) was increased from 11 to 12. It leads to the formation of dense HfOx film and improve the ability of the insulator layer. We confirm that HfOx layer have a good performance for dielectric layer in MOS capacitors.

• ETRI Journal
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• v.39 no.3
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• pp.390-397
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• 2017

In this paper, we propose a scheme for designing a tunable pixel layer based on a $Ge_2Sb_2Te_5$ (GST) alloy thin film. We show that the phase change of GST can significantly affect the reflection characteristic when the GST film is embedded into a dielectric encapsulation layer. We investigate the appropriate positions of the GST film within the dielectric layer for high diffraction efficiency, and we prove that they are antinodes of Fabry-Perot resonance inside the dielectric layer. Using the proposed scheme, we can increase the diffraction efficiency by about ten times compared to a bare GST film pixel, and 80 times for the first-to-zeroth-order diffraction power ratio. We show that the proposed scheme can be designed alternatively for a broadband or wavelength-selective type by tuning the dielectric thickness, and we discuss a multi-phase example with a double-stack structure.

• Proceedings of the KIEE Conference
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• 2000.07c
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• pp.1824-1826
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• 2000

Up to date, the dual scanning method has been adopted to decrease address-ing period in AC PDP. In this case, addressing period can be reduced, but the driving circuit cost should be increased. In this study, to increase addressing speed we have studied the relationship between addressing speed and cell structure. That is to say, we varied the thickness of dielectric layer on the front glass, the thickness of white back and the height of barrier rib on the rear glass. So, we found that the addressing time was decreased 4% with decreasing 5um thickness of dielectric layer on the front glass and 2um thickness of white back on the rear glass. Also in case of decreasing the height of barrier rib, addressing time was decreased about 4% per 10um.

• Journal of the Korean Ceramic Society
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• v.39 no.3
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• pp.222-225
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• 2002

Microwave dielectric properties of the layered and functionally graded materials (FGMs) of $Mg_{0.93}Ca_{0.07}TiO_3$ (MCT) and $(Ca_{0.3}Li_{0.14}Sm_{0.42})TiO_3$(CLST) were investigated as a function of the volume ratio of two components. Dielectric constant was decreased with an increase of the volume ratio of MCT which had a lower dielectric constant thant CLST. For the layered FGMs specimens, the difference of thermal expansion coefficients between two components induced thermal strain to dielectric layers, which was confirmed by the plot of ${\Delta}$k (X-ray diffraction peak width0 versus k (scattering vector) using the double-peak Lorentzian function, f(x). Quality factor of the specimens was affected by the thermal strain of dielectric layer, especially MCT layer. For the specimen with the volume ratio of MCT/CLST = 2, the qulaity factor of the specimen showed a minimum value due to the maximum thermal strain fo MCT layer.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.23 no.10
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• pp.759-762
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• 2010

In this investigation, the effects of $N_2/(Ar+N_2)$ gas partial pressure on the structural, electrical, and thermal properties of AlN dielectric layers prepared on aluminum substrates using RF-magnetron sputtering method were analyzed. Among the films, the AlN dielectric film deposited under $N_2/(Ar+N_2)$ gas partial pressure of 75% exhibit the highest AlN (002) preferred orientation, which was grain size of about 15.32 nm and very dense structure. We suggest the possibilities of it's application as a dielectric layer for metal PCB because the AlN films prepared at optimized gas partial pressure can improving the insulating property, the thermal conductivity, and thermal diffusivity of the films.

• Proceedings of the KIEE Conference
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• 2006.10a
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• pp.115-116
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• 2006

Dielectric PST (20/80) / PST (80/20) heterolayered thin films structures were created by a consequent deposition of the PST (20/80) and PST (80/20) thin films on the $Pt/Ti/SiO_2/Si$ substrate using alkoxide-based sol-gel method. Both structural and dielectric properties of heterolayered PST thin films were investigated for the tunable microwave device applications. As the number of coating increases, the lattice distortion decreased. It can be assumed that the lower PST layer affects a nucleation site or a seeding layer for the formation of the upper PST layer. The dielectric constant, dielectric loss and tunability of the PST-6 heterolayered structure measured at 100 kHz were 399, 0.022 and 57.9%, respectively. All these parameters showed an increase with increasing number of coatings due to the decrease in lattice distortion.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2001.09a
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• pp.72-75
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• 2001

In this paper, the $Sr_{1-x}Ca_{x}TiO_{3}(0{\leq}x{\leq}0.2)$ 2)-based grain boundary layer ceramics were fabricated to measured dielectric properties and voltage-current properties. The sintering temperature and time were $1420\sim1520^{\circ}C$, 4hours, in $N_{2}$ gas, respectively. The structural and the dielectric properties were investigated by SEM, X-ray, HP4194A and K6517. The 2nd phase formed by thermal diffusion from the surface lead to a very high apparent dielectric constant, $\varepsilon_r$ > 50000. X-ray diffraction patterns exhibited cubic structure for all specimens. Increasing content of Ca, the peak intensity were decreased.ﱇﶖ⨀ਆᘍ܀㘱㔮㠹㬅K䍄乍

• Journal of the Korean Vacuum Society
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• v.5 no.2
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• pp.161-168
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• 1996

For the improvement of microelectronic thin film interconnection materials, dielectric passivation effects on the electromigration phenomena were studied. Using Al-1%Si, various shaped patterns were fabricated and dielectric passivation layers of several structures were deposited on the $SiO_2$ layer. Lifetime of straight pattern showed 2~5 times longer than the other patterns that had various line width and area. It is believed that the flux divergence due to the structural inhomogeneity and so the current crowding effects shorten the lifetime of thin film interconnections. The lifetime of thin film interconnections seems to depend on both the passivation materials and the passivation thickness. PSG/$SiO_2$ dielectric passivation layers showed longer lifetime than $Si_3N_4$ dielectric passivation layers. This results from the PSG on $SiO_2$ layer reduces stress and from the improvement of resistance to the moisture and to the mobile ion such as sodium. This is also believed that the lifetime of thin film interconnections seems to depend on the passivation thickness in case of the same deposition materials.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.10 no.5
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• pp.1-5
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• 2010

This paper deals with a method to measure the thickness of scale-layer, iron oxide formed on the surface of the rolling steel, using a dielectric lens antenna. The dielectric lens antenna has an independent characteristic with the frequency in the X-band and changes the spherical wave radiated from a horn antenna into a plane wave at the focusing point. Using this concept, we regard a scale-layer on the rolling steel as a dielectric-PEC(Perfect Electric Conductor) layer and apply a theoretical analysis of the normal-incident plane wave. To reduce the phase error arising from the use of the dielectric lens antenna, this paper utilizes a regression process algorithm. In comparison with the conventional iteration algorithm, the present algorithm led to a unique solution for the thickness of the scale-layer.