• Journal of the Microelectronics and Packaging Society
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• v.29 no.1
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• pp.71-75
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• 2022

Graphene oxide was stirred with a ZnCl₂:NaCl electrolyte and electrochemically coated by cyclic voltammetry to simplify the electron transpfer layer film forming process for organic solar cells and to fabricate an organic solar cell having it. The device structure is FTO/ZnO:graphene/P3HT:PCBM/PEDOT:PSS/Ag. Morphology and chemical properties of ETL were confirmed by scanning electron microscopy(SEM), X-ray photoelectron spectroscopy (XPS), and Raman spectroscopy. As a result of XPS measurement, ZnO metal oxide and carbon bonding were simultaneously confirmed, and ZnO and graphene peaks were confirmed by Raman spectroscopy. The electrical characteristics of the manufactured solar cell were specified with a solar simulator, and the ETL device coated twice at a rate of 0.05 V/s showed the highest photoelectric conversion efficiency of 1.94%.

• Journal of the Microelectronics and Packaging Society
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• v.29 no.2
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• pp.19-31
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• 2022

With the advent of technologies based on big data, the trend of electronics towards high performance and high integration density continues. However, this development of electronics suffers from overheating issues, which seriously threaten the reliability of the devices. To develop effective strategies for thermal management, it is crucial to accurately evaluate the temperature distribution and design the heat dissipation path within the device in the operating condition. This paper introduces thermoreflectance microscopy that can observe the temperature distribution of a device with high spatial and temporal resolutions in a non-contact way. Specifically, the working principle and various forms of thermoreflectance microscopy are presented along with the latest research trends to improve the temperature, space, and time resolutions. We further review several examples in which thermoreflectance microscopy is applied to investigate the temperature and thermal characteristics of electronic devices.

• Journal of the Microelectronics and Packaging Society
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• v.30 no.2
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• pp.43-51
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• 2023

In this paper, we introduce the development trends of power devices which is the key component for power conversion system in electric vehicles, and discuss the characteristics of the next-generation wide-bandgap (WBG) power devices. We provide an overview of the characteristics of the present mainstream Si insulated gate bipolar transistor (IGBT) devices and technology roadmap of Si IGBT by different manufacturers. Next, recent progress and advantages of SiC metal-oxide-semiconductor field-effect transistor (MOSFET) which are the most important unipolar devices, is described compared with conventional Si IGBT. Furthermore, due to the limitations of the current GaN power device technology, the issues encountered in applying the power conversion module for electric vehicles were described.

• Journal of the Microelectronics and Packaging Society
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• v.31 no.1
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• pp.7-15
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• 2024

In the trend of the multi-functionalization, miniaturization, and increased power output trends of flexible and stretchable electronic devices, the development of materials or structures with superior heat transfer characteristics has become a pressing issue. Traditional thermal interface materials (TIM) fail to meet the heat dissipation requirements of flexible and stretchable electronic devices, which must endure rapid bending, twisting, and stretching. To address this challenge, there is a demand for the development of TIM that simultaneously possesses high thermal conductivity and stretchability. This paper examines the research trends of liquid metal, carbon, and ceramic-based stretchable thermal interface materials and explores effective strategies for enhancing their thermal and mechanical properties.

• Journal of the Microelectronics and Packaging Society
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• v.27 no.1
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• pp.25-29
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• 2020

This study demonstrates direct-patternable amorphous TiO_x resistive switching (RS) device and the fabrication method using photochemical metal-organic deposition (PMOD). For making photosensitive stock solutions, Ti(IV) 2-ethylhexanoate was used as starting precursor. Photochemical reaction by UV exposure was observed and analyzed by Fourier transform infrared spectroscopy and the reaction was completed within 10 minutes. Uniformly formed 20 nm thick amorphous TiO_x film was confirmed by atomic force microscopy. Amorphous TiO_x RS device, formed as 6 × 6 ㎛ square on 4 ㎛ width electrode, showed forming-less RS behavior in ±4 V and on/off ratio ≈ 20 at 0.1 V. This result shows PMOD process could be applied for low temperature processed ReRAM device and/or low cost, flexible memory device.

• Journal of the Microelectronics and Packaging Society
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• v.14 no.4
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• pp.37-42
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• 2007

We fabricated the polymer light emitting diodes (PLEDs) with ITO/PEDOT:PSS/PVK/PFO:MEH-PPV/LiF/Al structures. The effect of the thickness of PEDOT:PSS hole injection layer(HIL) on the electrical and optical properties of PLEDs was investigated. In addition, PVK hole transport layer(HTL) was introduced in the PLED device, and compared the properties of the PLEDS with and without PVX layer. All organic film layers were prepared by the spin coating method on the plasma treated ITO/glass substrates. As the thickness of PEDOT:PSS film layer decreased from about 80 nm to 50 nm, the luminance of PLED device increased from $220cd/m^2$에서 $450cd/m^2$. This may be ascribed to the increased transportation efficiency of the holes into the emission layer of PLED. The maximum current density and luminance were obtained fir the PLED device with PVX hole transport layer, showing that the current density and luminance were $268mA/cm^2\;and\;540cd/m^2$ at 12V, respectively. This values were improved by about 14% and 22% in current density and luminance compared with the PLED device without PVK layer.

• Journal of the Microelectronics and Packaging Society
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• v.23 no.2
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• pp.79-84
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• 2016

A flexible electronic device deformed by external force causes the failure of a semiconductor die. Even without failure, the repeated elastic deformation changes carrier mobility in the channel and increases resistivity in the interconnection, which causes malfunction of the integrated circuits. Therefore it is desirable that a semiconductor die be placed on a neutral line where the mechanical stress is zero. In the present study, we investigated the effects of design factors on the position of neutral line by finite element analysis (FEA), and expected the possible failure behavior in a flexible face-down packaging system assuming flip-chip bonding of a silicon die. The thickness and material of the flexible substrate and the thickness of a silicon die were considered as design factors. The thickness of a flexible substrate was the most important factor for controlling the position of the neutral line. A three-dimensional FEA result showed that the von Mises stress higher than yield stress would be applied to copper bumps between a silicon die and a flexible substrate. Finally, we suggested a designing strategy for reducing the stress of a silicon die and copper bumps of a flexible face-down packaging system.

• Journal of the Microelectronics and Packaging Society
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• v.27 no.1
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• pp.37-43
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• 2020

The effects of O₂ plasma pre-treatment and post-annealing conditions on the interfacial adhesion of Ti thin film and WPR dielectric were investigated using 90° peel test for fan-out wafer level packaging (FOWLP) redistribution layer (RDL) applications. Peel strength between Ti film and WPR dielectric decreased from 8.9±1.3 g/mm to 2.7±0.9 g/mm for variation of O₂ plasma pre-treatment time from 30s to 300s, which is closely related to C-O-C or C=O bonds breakage at the WPR dielectric surface due to excessive plasma pre-treatment conditions. During post-annealing at 150℃, the peel strength abruptly decreased from 0 h to 24 h, and then maintained constant until 100 h, which is also mainly due to the damage of WPR dielectric which is weak to high temperature. Therefore, the optimum plasma pre-treatment conditions on the surface of dielectric is essential to interfacial reliability of FOWLP RDL.

• Journal of the Microelectronics and Packaging Society
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• v.23 no.2
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• pp.57-63
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• 2016

We developed a flexible and micro-thick electromagnetic interference (EMI) shielding nanofabric layer that also functions as a water resisting and heat sinking material. Electrospinning followed by a simple heat treatment process was carried on to produce the EMI-shielding Ni/C hybrid nanofibers. The ambient oxygen partial pressure ($pO_2$ = 0.1, 0.7, 1.3 Torr) applied during the heat treatment was varied in order to optimize the effectiveness of EMI-shielding by modifying the size and crystallinity of the magnetic Ni nanoparticles distributed throughout the C nanofibers. Permittivity and permeability of the nanofibers under the electromagnetic (EM) wave frequency range of 300 MHz~1 GHz were measured, which implied the EMI-shielding effectiveness (SE) optimization at $pO_2$ = 0.7 Torr during the heat treatment. The materials' heat diffusivity for both in-plane direction and vertical direction was measured to confirm the anisotropic thermal diffusivity that can effectively deliver and sink the local heat produced during device operations. Also, the nanofibers were aged at room temperature in oxygen ambient for water resisting function.

• Journal of the Microelectronics and Packaging Society
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• v.19 no.3
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• pp.9-14
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• 2012

Robust power delivery and distribution are considered one of the major challenges in electronic devices today. As a technology develops (i.e. frequency and complexity, increase and size decreases), both power density and power supply noise increase, and voltage supply margin decreases. In addition, thermal problem is induced due to high power and poor power distribution. Until now most of studies to improve power delivery and distribution have been focused on device circuit or system architecture designs. Interconnect process technologies to resolve power delivery issues have not greatly been explored so far, but recently it becomes of great interest as power increases and voltage specification decreases in a smaller chip size.