• Title/Summary/Keyword: device degradation

Search Result 474, Processing Time 0.028 seconds

Drain-current Modeling of Sub-70-nm PMOSFETs Dependent on Hot-carrier Stress Bias Conditions

  • Lim, In Eui;Jhon, Heesauk;Yoon, Gyuhan;Choi, Woo Young
    • JSTS:Journal of Semiconductor Technology and Science
    • /
    • v.17 no.1
    • /
    • pp.94-100
    • /
    • 2017
  • Stress drain bias dependent current model is proposed for sub-70-nm p-channel metal-oxide semiconductor field-effect transistors (pMOSFETs) under drain-avalanche-hot-carrier (DAHC-) mechanism. The proposed model describes the both on-current and off-current degradation by using two device parameters: channel length variation (${\Delta}L_{ch}$) and threshold voltage shift (${\Delta}V_{th}$). Also, it is a simple and effective model of predicting reliable circuit operation and standby power consumption.

Influence of Substrate Thermal Conductivity on OLED Lifetime

  • Chung, Seung-Jun;Lee, Jae-Hyun;Jeong, Jae-Wook;Kim, Jang-Joo;Hong, Yong-Taek
    • 한국정보디스플레이학회:학술대회논문집
    • /
    • 2008.10a
    • /
    • pp.1026-1029
    • /
    • 2008
  • Temperature increase during OLED operation can significantly degrade the device lifetime. By using top-emission OLEDs fabricated on glass and silicon substrates that have different thermal conductivities, we found that efficient heat dissipation and corresponding lifetime improvement can be obtained by making a direct contact between the OLED anode and the high thermally-conductive silicon substrate. We describe substrate-dependent OLED heat dissipation behavior and OLED lifetime improvement by using infrared camera images and constant current stress test methods.

  • PDF

Nonvolatile Semiconductor Memories Using BT-Based Ferroelectric Films

  • Yang, Bee-Lyong;Hong, Suk-Kyoung
    • Journal of the Korean Ceramic Society
    • /
    • v.41 no.4
    • /
    • pp.273-276
    • /
    • 2004
  • Report ferroelectric memories based on 0.35$\mu\textrm{m}$ CMOS technology ensuring ten-year retention and imprint at 175$^{\circ}C$. This excellent reliability resulted from newly developed BT-based ferroelectric films with superior reliability performance at high temperatures, and also resulted from robust integration schemes free from ferroelectric degradation due to process impurities such as moisture and hydrogen. The superior reliabilities at high temperature of ferroelectric memories using BT-based films are due to the random orientation by special bake treatments.

Uniformity Optimization of TFTs Fabricated on 2-shot SLS-Processed Si Films

  • Turk, Brandon A.;Wilt, P.C. Van Der;Crowder, M.A.;Voutsas, A.T.;Limanov, A.B.;Chung, U.J.;Im, James S.
    • 한국정보디스플레이학회:학술대회논문집
    • /
    • 2006.08a
    • /
    • pp.1750-1755
    • /
    • 2006
  • Nonoptimal placement of short-channel-length TFTs in large-grained polycrystalline Si films with a periodic microstructure, as for instance obtained via 2-shot SLS, can potentially lead to degradation in the overall uniformity of the resultant devices. In this paper, we explain and demonstrate that by simply introducing a well-defined misorientation between the devices and the periodic microstructure, it is possible to significantly reduce (and potentially entirely eliminate) the device nonuniformity problem that can arise from such a cause.

  • PDF

Electrical Characteristics of Devices with Material Variations of PMD-1 Layers (PMD-1 층의 물질변화에 따른 소자의 전기적 특성)

  • Seo, Yonq-Jin;Kim, Sang-Yong;Yu, Seok-Bin;Kim, Tae-Hyung;Kim, Chang-Il;Chang, Eui-Goo
    • Proceedings of the KIEE Conference
    • /
    • 1998.07d
    • /
    • pp.1327-1329
    • /
    • 1998
  • It is very important to select superior inter-layer PMD(Pre Metal Dielectric) materials which can act as penetration barrier to various impurities created by CMP processes. In this paper, hot carrier degradation and device characteristics were studied with material variation of PMD-1 layers, which were split by LP-TEOS, SR-Oxide, PE-Oxynitride, PE-Nitride, PE-TEOS films. It was observed that the oxynitride and nitride using plasma was greatly decreased in hot carrier effect in comparison with silicon oxide. Consequently, silicon oxide turned out to be a better PMD-1 material than PE-oxynitride and PE-nitride. Also, LP-TEOS film was the best PMD-1 material Among the silicon oxides.

  • PDF

Experimental Investigation of Drag Reduction by Polymer Additives (중합제 첨가에 의한 항력 감소 효과에 관한 실험적 연구)

  • 성형진;위장우;권순홍;전호환
    • Journal of Ocean Engineering and Technology
    • /
    • v.16 no.4
    • /
    • pp.1-6
    • /
    • 2002
  • Experimental investigation of drag reduction by adding a polymer additive(polyacrylamid, N-401P) into water is carried out in a Circular Water Channel. The effect of viscosity, surface roughness and degradation as a function of running time is also measured with varying the concentration of polymer additives(20ppm,100ppm) and Reynolds numbers. Near and far wakes past a circular cylinder are observed by LDV. Drag forces are measured with a strain-gaged device. The experimental results show that around 5%-30% of drag reduction with the polymer solution are observed. The larger effects of drag reduction can be found at low range of Reynolds number, more roughened surface cylinder. The effect of polymer solution for near wakes is larger than for far wakes.

Position Control of Linear Actuator with Uncertain Time Delay in VDN

  • Kim, Jonghwi;Kiwon Song;Park, Gi-Sang;Park, Gi-Heung
    • 제어로봇시스템학회:학술대회논문집
    • /
    • 2002.10a
    • /
    • pp.118.2-118
    • /
    • 2002
  • Uncertain time delay happens when the process reads the sensor data and sends the control input to the plant located at a remote site in distributed control system. As in the case of data network using TCP/IP, VDN that integrates both device network and data network has uncertain tim e delay. Uncertain time delay can cause degradation in stability of distributed control system based on VDN. This paper investigates the transmission characteristic of VDN and suggests a control scheme based on the Smith's predictor to minimize the effect of uncertain time delay. The validity of the proposed control scheme is demonstrated with tracking position control of experiments.

  • PDF

A Study on Buffered Deposition Device Structure to Improvement for High Density Chip Realiability (고밀도 칩 신뢰성 개선을 위한 buffered deposition 소자구조에 관한 연구)

  • Kim, Hwan-Seog;Yi, Cheon-Hee
    • Journal of the Korea Society for Simulation
    • /
    • v.17 no.2
    • /
    • pp.13-19
    • /
    • 2008
  • New Buffered deposition is proposed to decrease junction electric field in this paper. Buffered deposition process is fabricated after first gate etch, followed NM1 ion implantation and deposition & etch nitride layer. New Buffered deposition structure has buffer layer to decrease electric field. Also we compared the hot carrier characteristics of Buffered deposition and conventional. Also, we design a test pattern including NMOSFET, PMOSFET, LvtNMOS, High pressure N/PMOSFET, so that we can evaluate DC/AC hot carrier degradation on-chip. As a result, we obtained 10 years hot carrier life time satisfaction.

  • PDF

Performance-Based Reliability Measures for Gracely Degrading Systems: the Concept (성능이 서서히 저하되는 시스템의 신뢰도 척도)

  • Kim, Yon-Soo;Park, Sang-Min
    • Journal of Korean Society of Industrial and Systems Engineering
    • /
    • v.17 no.32
    • /
    • pp.227-232
    • /
    • 1994
  • In the performance domain, physical performance is a measure that represents some degree of system, subsystem, component or device success in a continuous sense, as opposed to a classical binomial sense (success or failure). If applicable sensing and monitoring means exist, physical performance can be observed over time, along with explanatory variables or covariables. Performance-based reliability represents the probability that performance will remain satisfactory over a finite period of time or usage cycles in the future when a performance critical limit (which represents an appropriate definition of failure in terms of performance) is set at a fixed level, based on application requirements. In the case of inadequate knowledge of the failure mechanics, this physical based empirical modeling concept along with performance degradation knowledge can serve as an important analysis tool in reliability work in product and process improvement.

  • PDF

Data Transmission over Power Line with Lightning Protection Devices

  • Kim, Sungeon;Jeon, Taehyun
    • International journal of advanced smart convergence
    • /
    • v.2 no.1
    • /
    • pp.27-29
    • /
    • 2013
  • This paper discusses comparative analysis of the effects of surge protection devices (SPD) upon the power line communication channels. The quality of the data transmission channel is measured based on the data rate for the various channel parameters which include channel length and application method of the lightning protection device. The performance measurements are also carried out for various lengths of the communication channel. Experiment results show that specific combination of SPDs applied in the network causes severe degradation of the channel quality which is associated with the combination of grade levels and channel lengths.