• ETRI Journal
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• v.35 no.1
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• pp.142-145
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• 2013

Network virtualization opens the door to novel infrastructure services offering connectivity and node manageability. In this letter, we focus on the cost-efficient embedding of on-demand virtual optical network requests for interconnecting geographically distributed data centers. We present a mixed integer linear programming formulation that introduces flexibility in the virtual-physical node mapping to optimize the usage of the underlying physical resources. Illustrative results show that flexibility in the node mapping can reduce the number of add-drop ports required to serve the offered demands by 40%.

• JSTS:Journal of Semiconductor Technology and Science
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• v.17 no.4
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• pp.543-551
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• 2017

SOL (Short, Open and Load) calibration based on iterative error sensitivity is proposed in this paper. With advanced SOL calibration, unknown parasitic parameters at on-chip terminations are accurately estimated up to 20 GHz. Artificial terminations are designed on printed circuit board (PCB) to experiment the proposed method. On-chip SHORT, OPEN and LOAD fabricated inside silicon shows the accuracy of proposed calibration method through the comparison with known fixture S-parameter after de-embedding.

• Journal of electromagnetic engineering and science
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• v.1 no.2
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• pp.139-145
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• 2001

In this paper, a coaxial sample holder is proposed with its de-embedding and parameter extraction procedure. The S-parameters were measured up to 1 GHz using network analyzer, HP8753D, and N-type connector together with the de-embedding of N-type connector. The proposed de-embedding procedure is performed to extract electrical parameters of blood glucose, which gives the permittivity of blood glucose. We also analyzed the error of extracted parameters, which are caused by instrument error and geometrical error. Using these error analyses, we reduced the error factors of extracted parameters. We extracted electrical parameters of glucose samples through these all extraction procedure and confirmed the possibility of glucose diagnosis system based on microwave system.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.24 no.6
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• pp.633-643
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• 2013

GDS format files, as well as layout of the chip are noticeably needed so as to analyze the PDN (Power Delivery Network) inside of IC; however, commercial IC in the market has not supported design information which is layout of IC. Within this, in terms of IC having on-chip PDN, characteristic of inside PDN of the chip is a core parameter to predict generated noise from power/ground planes. Consequently, there is a need to scrutinize extraction method for unknown PDN of the chip in this paper. To extract PDN of the chip without IC circuit information, the de-embedding test vehicle is fabricated based on IEC62014-3. Further more, the extracted inside PDN of chip from de-embedding technique adopts the Co-simulation model which composes PCB, QFN (Quad-FlatNo-leads) Package, and Chip for the PDN, applied Co-simulation model well corresponds with impedance from measured S-parameters up to 4 GHz at common measured and simulated points.

• Bulletin of the Korean Mathematical Society
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• v.53 no.3
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• pp.885-902
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• 2016

In this paper we begin the study of $L_k$-2-type hypersurfaces of a hypersphere ${\mathbb{S}}^{n+1}{\subset}{\mathbb{R}}^{n+2}$ for $k{\geq}1$ Let ${\psi}:M^3{\rightarrow}{\mathbb{S}}^4$ be an orientable $H_k$-hypersurface, which is not an open portion of a hypersphere. Then $M^3$ is of $L_k$-2-type if and only if $M^3$ is a Clifford tori ${\mathbb{S}}^1(r_1){\times}{\mathbb{S}}^2(r_2)$, $r^2_1+r^2_2=1$, for appropriate radii, or a tube $T^r(V^2)$ of appropriate constant radius r around the Veronese embedding of the real projective plane ${\mathbb{R}}P^2({\sqrt{3}})$.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.46 no.9
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• pp.46-51
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• 2009

This paper propose the new approach of the quantity effect by high efficiency inductor characteristic to the harmonic suppression of the lowpass filter. We applied the reliable de-embedding process in order to extract the precise elements values. Moreover, for the effective its application and comparison, the variable stepped impedance low pass filters with a same specification are designed. The proposed procedure is expected to handle the overall filter performance and to construct a synthesized equivalent circuit from its determined specification.

• Proceedings of the IEEK Conference
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• 2001.06b
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• pp.217-220
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• 2001

CaN(gallium nitride) MODFET(modulation doped field effect transistor) large signal model was studied using Modified Materka-Kacprzak large signal MODFET model. using the Dambrine's method［3, at 45MHz-40㎓, Measured S-parameter and DC characteristics. based on measuring results, small signal parameter extraction was conducted. by the cold FET［4］method, measured parasitic elements were de-embedding. Extracted small signal parameters were modeled using modified Materka model, a sort of fitting function reproduce measuring results. to confirm conducted large signal modeling, modeled GaN MODFET's DC, S-parameter and Power characteristics were compared to measured results, respectively. by results were represented comparatively agreement, this paper showed that modified Materka model was useful in the GaN MODFET large signal modeling.

• Journal of Electrical Engineering and information Science
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• v.2 no.5
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• pp.17-26
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• 1997

Interconnect characterization on a wafer level was performed. Test patterns for single, two-coupled, and triple-coupled lines ere designed by using 0.5$\mu\textrm{m}$ CMOS process. Then interconnect capacitances and resistances were experimentally extracted by using tow port network measurements, Particularly to eliminate parasitic effects, the Y-parameter de-embedding was performed with specially designed de-embedding patterns. Also, for the purpose of comparisons, capacitance matrices were calculated by using the existing CAD model and field-solver-based commercial simulator, METAL and MEDICI. This work experimentally verifies that existing CAD models or parameter extraction may have large deviation from real values. The signal transient simulation with the experimental data and other methodologies such as field-solver-based simulation and existing model was performed. as expected, the significantly affect on the signal delay and crosstalk. The signal delay due to interconnects dominates the sub-micron-based a gate delay (e.g., inverter). Particularly, coupling capacitance deviation is so large (about more than 45% in the worst case) that signal integrity cannot e guaranteed with the existing methodologies. The characterization methodologies of this paper can be very usefully employed for the signal integrity verification or he electrical design rule establishments of IC interconnects in the industry.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.57 no.12
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• pp.2269-2275
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• 2008

This paper examined the simulation results after applying not only spiral inductor's 3D EM simulation but also de-embedding technique to reduce the pad's RF effects. When calculating standard deviation with measurement results not only the gain at 0.5GHz${\sim}$4GHz but also noise figure at 1.8GHz${\sim}$4GHz, the simulation results includes de-embedded inductor' model improved gain deviation by 0.171 and noise figure deviation by 0.151 than the results from simulation with foundry inductor equivalent circuit models.

• Journal of the Korean Mathematical Society
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• v.49 no.6
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• pp.1259-1271
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• 2012

We consider a tournament T = (V,A). For each subset X of V is associated the subtournament T(X) = (X,$A{\cap}(X{\times}X)$) of T induced by X. We say that a tournament T' embeds into a tournament T when T' is isomorphic to a subtournament of T. Otherwise, we say that T omits T'. A subset X of V is a clan of T provided that for a, $b{\in}X$ and $x{\in}V{\backslash}X$, $(a,x){\in}A$ if and only if $(b,x){\in}A$. For example, ${\emptyset}$, $\{x\}(x{\in}V)$ and V are clans of T, called trivial clans. A tournament is indecomposable if all its clans are trivial. In 2003, B. J. Latka characterized the class ${\tau}$ of indecomposable tournaments omitting a certain tournament $W_5$ on 5 vertices. In the case of an indecomposable tournament T, we will study the set $W_5$(T) of vertices $x{\in}V$ for which there exists a subset X of V such that $x{\in}X$ and T(X) is isomorphic to $W_5$. We prove the following: for any indecomposable tournament T, if $T{\notin}{\tau}$, then ${\mid}W_5(T){\mid}{\geq}{\mid}V{\mid}$ -2 and ${\mid}W_5(T){\mid}{\geq}{\mid}V{\mid}$ -1 if ${\mid}V{\mid}$ is even. By giving examples, we also verify that this statement is optimal.