• 제목/요약/키워드: charge-to-breakdown

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XLPE/EPDM laminate의 첨가제에 따른 전하분포특성 (Interfacial Breakdown Characteristics in XLPE/EPDM Laminate as a function of Additives)

  • 남진호;서광석
    • 한국항해항만학회:학술대회논문집
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    • 한국항해항만학회 2000년도 추계학술대회논문집
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    • pp.77-80
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    • 2000
  • In order to determine what influences the interfacial charge in EPDM/XLPE laminates, We used PEA (pulsed electroacoustic) method. Interfacial properties such as space charge accumulation and breakdown strength in crosslinked polyethylene (XLPE)/ethylene-propylene-diene monomer (EPDM) laminates were investigated. Interfacial charge develops when the EPDM is laminated with XLPE. It showed the positive polarity same as the simulation in case on intercase of EPDM/XLPE. In case of coupling agent added silicone oil, as increasing the content of coupling agent, the interfacial charge decreased. Details of the results are given and their origins discussed.

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XLPE/EPDM laminate의 첨가제에 따른 전하분포특성 (Interfacial Breakdown Characteristics in XLPE/EPDM Laminate as a function of Additives)

  • 남진호;서광석
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2000년도 추계학술대회 논문집
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    • pp.77-80
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    • 2000
  • In order to determine what influences the interfacial charge in EPDM/XLPE laminates, We used PEA (pulsed electroacoustic) method. Interfacial properties such as space charge accumulation and breakdown strength in crosslinked polyethylene (XLPE)/ethylene-propylene-diene monomer (EPDM) laminates were investigated. Interfacial charge develops when the EPDM is laminated with XLPE. It showed the positive polarity same as the simulation in case on intercase of EPDM/XLPE. In case of coupling agent added silicone oil, as increasing the content of coupling agent, the interfacial charge decreased. Details of the results are given and their origins discussed.

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Optimization of charge and multiplication layers of 20-Gbps InGaAs/InAlAs avalanche photodiode

  • Sim, Jae-Sik;Kim, Kisoo;Song, Minje;Kim, Sungil;Song, Minhyup
    • ETRI Journal
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    • 제43권5호
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    • pp.916-922
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    • 2021
  • We calculated the correlation between the doping concentration of the charge layer and the multiplication layer for separate absorption, grading, charge, and multiplication InGaAs/InAlAs avalanche photodiodes (APDs). For this purpose, a predictable program was developed according to the concentration and thickness of the charge layer and the multiplication layer. We also optimized the design, fabrication, and characteristics of an APD for 20 Gbps application. The punch-through voltage and breakdown voltage of the fabricated device were 10 V and 33 V, respectively, and it was confirmed that these almost matched the designed values. The 3-dB bandwidth of the APD was 10.4 GHz, and the bit rate was approximately 20.8 Gbps.

Wet 게이트 산화막과 Nitride 산화막 소자의 특성에 관한 연구 (A Study on Characteristics of Wet Gate Oxide and Nitride Oxide(NO) Device)

  • 이용희;최영규;류기한;이천희
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 1999년도 하계종합학술대회 논문집
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    • pp.970-973
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    • 1999
  • When the size of the device is decreased, the hot carrier degradation presents a severe problem for long-term device reliability. In this paper we fabricated & tested the 0.26${\mu}{\textrm}{m}$ NMOSFET with wet gate oxide and nitride oxide gate to compare that the characteristics of hot carrier effect, charge to breakdown, transistor Id_Vg curve and charge trapping using the Hp4145 device tester As a result we find that the characteristics of nitride oxide gate device better than wet gate oxide device, especially a hot carrier lifetime(nitride oxide gate device satisfied 30years, but the lifetime of wet gate oxide was only 0.1year), variation of Vg, charge to breakdown and charge trapping etc.

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Enhancement of On-Resistance Characteristics Using Charge Balance Analysis Modulation in a Trench Filling Super Junction MOSFET

  • Geum, Jongmin;Jung, Eun Sik;Kim, Yong Tae;Kang, Ey Goo;Sung, Man Young
    • Journal of Electrical Engineering and Technology
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    • 제9권3호
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    • pp.843-847
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    • 2014
  • In Super Junction (SJ) MOSFETs, charge balance is the most important issue of the SJ fabrication process. In order to achieve the best electrical characteristics, such as breakdown voltage and on-resistance, the N-type and P-type drift regions must be fully depleted when the drain bias approaches the breakdown voltage, which is known as the charge balance condition. In conventional charge balance analysis, based on multi-epi process SJ MOSFETs, analytical model has only N, P pillar width and doping concentration parameter. But applying a conventional charge balance principle to trench filling process, easier than Multi-epi process, is impossible due to the missing of the trench angle parameter. To achieve much more superior characteristics of on-resistance in trench filling SJ MOFET, the appropriate trench angle is necessary. So in this paper, modulated charge balance analysis is proposed, in which a trench angle parameter is added. The proposed method is validated using the TCAD simulation tool.

GaAs MESFET의 파괴특성 향상을 위한 recess게이트 구조 (The recess gate structure for the improvement of breakdown characteristics of GaAs MESFET)

  • 장윤영;송정근
    • E2M - 전기 전자와 첨단 소재
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    • 제7권5호
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    • pp.376-382
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    • 1994
  • In this study we developed a program(DEVSIM) to simulate the two dimensional distribution of the electrostatic potential and the electric field of the arbitrary structure consisting of GaAs/AlGaAs semiconductor and metal as well as dielectric. By the comparision of the electric field distribution of GaAs MESFETs with the various recess gates we proposed a suitable device structure to improve the breakdown characteristics of MESFET. According to the results of simulation the breakdown characteristics were improved as the thickness of the active epitaxial layer was decreased. And the planar structure, which had the highly doped layer under the drain for the ohmic contact, was the worst because the highly doped layer prevented the space charge layer below the gate from extending to the drain, which produced the narrow spaced distribution of the electrostatic potential contours resulting in the high electric field near the drain end. Instead of the planar structure with the highly doped drain the recess gate structure having the highly doped epitaxial drain layer show the better breakdown characteristics by allowing the extention of the space charge layer to the drain. Especially, the structure in which the part of the drain epitaxial layer near the gate show the more improvement of the breakdown characteristics.

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질화, 재산화시진 모스 절연막의 온도 변화에 따른 누설전류의 변화 (Temperature dependance of Leakage Current of Nitrided, Reoxided MOS devices)

  • 이정석;장창덕;이용재
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 1998년도 춘계학술대회 논문집
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    • pp.71-74
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    • 1998
  • In this Paper, we investigate the electrical properties of ultra-thin(70${\AA}$) nitrided(NO) and reoxidized nitrided oxide(ONO) film that ale considered to be premising candidates for replacing conventional silicon dioxide film in ULSI level integration. we studied I$\sub$g/-V$\sub$g/ characteristics to know the effect of nitridation and reoxidation on the current conduction, leakage current time-dependent dielectric breakdown(TDDB) to evaluate charge-to-breakdown(Q$\sub$bd/), and the effect of stress temperature(25, 50, 75, 100$^{\circ}C$) and compared to those with thermal gate oxide(SiO$_2$) of identical thickness. From the measurement results, we find that reoxidized nitrided oxide(ONO) film shows superior dielectric characteristics, leakage current, and breakdown-to-charge(Qbd) performance over the NO film, while maintaining a similar electric field dependence compared to NO layer. Besides, ONO film has strong resistance against variation in temperature.

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LDPE/PS 블렌드의 전기적 성질에 미치는 상용화제로서의 SEBS의 효과 (Compatibilizing Effect of SEBS for Electrical Properties of LDPE/PS Blends)

  • 김태영;김동명;김원중;이제혁;서광석;이태희
    • 대한전기학회논문지:전기물성ㆍ응용부문C
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    • 제54권3호
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    • pp.114-119
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    • 2005
  • We investigated compatibilizing effects of electrical properties such as charge distributions and electrical breakdown in blends of low density polyethylene (LDPE) / polystyrene (PS) with poly [styrene-b-(ethylene-co-butylene)-b-styrene] (SEBS), the triblock copolymer. The blends with $70\;wt\%$ of LDPE and $30\;wt\%$ of PS were prepared through a melt blending in a batch type kneader at a temperature of $220^{\circ}C$ when the SEBS content increased up to $10\;wt\%$. Scanning electron microscopy (SEM) was investigated for observation of morphology of LDPE / PS blends increasing SEBS contents. The morphological observation showed that addition of SEBS results in the domain size reduction of the dispersed PS phase and a better interfacial adhesion between LDPE and PS phases. Measurements of space charge distributions for blends was carried out with pulsed electroacoustic (PEA) method. It was possible to observe that the amount of charge storage in the LDPE / PS blends decreased wiか increasing of SEBS content. The location of SEBS at a domain interface enables charges to move from one phase to the other via domain interface and results in a indicative decrease in the amount of space charge for the LDPE / PS blends with SEBS. Electrical breakdown strength of these blends was observed. It was found that the maximum breakdown strength of the blend was 51.55 kV/mm. These results were better than 38.38 kV/mm of LDPE used electrical insulator for cables and were caused by crystalinity of blends. Because the crystalinity of blends were lower than LDPE, electrical breakdown strength of LDPE / PS blends is higher than that of LDPE. We evaluated the possibility of these blends for insulating material substituted LDPE.

Design and Fabrication of Super Junction MOSFET Based on Trench Filling and Bottom Implantation Process

  • Jung, Eun Sik;Kyoung, Sin Su;Kang, Ey Goo
    • Journal of Electrical Engineering and Technology
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    • 제9권3호
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    • pp.964-969
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    • 2014
  • In Super Junction MOSFET, Charge Balance is the most important issue of the trench filling Super Junction fabrication process. In order to achieve the best electrical characteristics, the N type and P type drift regions must be fully depleted when the drain bias approaches the breakdown voltage, called Charge Balance Condition. In this paper, two methods from the fabrication process were used at the Charge Balance condition: Trench angle decreasing process and Bottom implantation process. A lower on-resistance could be achieved using a lower trench angle. And a higher breakdown voltage could be achieved using the bottom implantation process. The electrical characteristics of manufactured discrete device chips are compared with those of the devices which are designed of TCAD simulation.

표면 전하에 의한 Thyristor 소자의 차단전압 및 누설전류특성 연구 (Study on the Blocking Voltage and Leakage Current Characteristic Degradation of the Thyristor due to the Surface Charge in Passivation Material)

  • 김형우;서길수;방욱;김기현;김남균
    • 대한전기학회논문지:전기물성ㆍ응용부문C
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    • 제55권1호
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    • pp.34-39
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    • 2006
  • In high-voltage devices such as thyristor, beveling is mostly used junction termination method to reduce the surface electric field far below the bulk electric field and to expand the depletion region thus that breakdown occurs in the bulk of the device rather than at the surface. However, coating material used to protect the surface of the device contain so many charges which affect the electrical characteristics of the device. And device reliability is also affected by this charge. Therefore, it is needed to analyze the effect of surface charge on electrical characteristics of the device. In this paper, we analyzed the breakdown voltage and leakage current characteristics of the thyristor as a function of the amount of surface charge density. Two dimensional process simulator ATHENA and two-dimensional device simulator ATLAS is used to analyze the surface charge effects.