• Title/Summary/Keyword: calibration circuit

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Averaging Current Adjustment Technique for Reducing Pixel Resistance Variation in a Bolometer-Type Uncooled Infrared Image Sensor

  • Kim, Sang-Hwan;Choi, Byoung-Soo;Lee, Jimin;Lee, Junwoo;Park, Jae-Hyoun;Lee, Kyoung-Il;Shin, Jang-Kyoo
    • Journal of Sensor Science and Technology
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    • v.27 no.6
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    • pp.357-361
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    • 2018
  • This paper presents an averaging current adjustment technique for reducing the pixel resistance variation in a bolometer-type uncooled infrared image sensor. Each unit pixel was composed of an active pixel, a reference pixel for the averaging current adjustment technique, and a calibration circuit. The reference pixel was integrated with a polysilicon resistor using a standard complementary metal-oxide-semiconductor (CMOS) process, and the active pixel was applied from outside of the chip. The averaging current adjustment technique was designed by using the reference pixel. The entire circuit was implemented on a chip that was composed of a reference pixel array for the averaging current adjustment technique, a calibration circuit, and readout circuits. The proposed reference pixel array for the averaging current adjustment technique, calibration circuit, and readout circuit were designed and fabricated by a $0.35-{\mu}m$ standard CMOS process.

A Threshold-voltage Sensing Circuit using Single-ended SAR ADC for AMOLED Pixel (단일 입력 SAR ADC를 이용한 AMOLED 픽셀 문턱 전압 감지 회로)

  • Son, Jisu;Jang, Young-Chan
    • Journal of IKEEE
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    • v.24 no.3
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    • pp.719-726
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    • 2020
  • A threshold-voltage sensing circuit is proposed to compensate for pixel aging in active matrix organic light-emitting diodes. The proposed threshold-voltage sensing circuit consists of sample-hold (S/H) circuits and a single-ended successive approximation register (SAR) analog-to-digital converter (ADC) with a resolution of 10 bits. To remove a scale down converter of each S/H circuit and a voltage gain amplifier with a signl-to-differentail converter, the middle reference voltage calibration and input range calibration for the single-ended SAR ADC are performed in the capacitor digital-to-analog converter and reference driver. The proposed threshold-voltage sensing circuit is designed by using a 180-nm CMOS process with a supply voltage of 1.8 V. The ENOB and power consimption of the single-ended SAR ADC are 9.425 bit and 2.83 mW, respectively.

CMOS Programmable Interface Circuit for Capacitive MEMS Gyroscope (MEMS 용량형 각속도 센서용 CMOS 프로그래머블 인터페이스 회로)

  • Ko, Hyoung-Ho
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.48 no.9
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    • pp.13-21
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    • 2011
  • In this paper, the CMOS programmable interface circuit for MEMS gyroscope is presented, and evaluated with the MEMS sensing element. The circuit includes the front-end charge amplifier with 10 bit programmable capacitor arrays, 9 bit DAC for accurate offset calibration, and 10 bit PGA for accurate gain calibration. The self oscillation loop with automatic gain control operates properly. The offset error and gain error after calibration are measured to be 0.36 %FSO and 0.19 %FSO, respectively. The noise equivalent resolution and bias instability are measured to be 0.016 deg/sec and 0.012 deg/sec, respectively. The calibration capability of this circuit can reduce the variations of the output offset and gain, and this can enhance the manufacturability and can improve the yield.

Gain and Phase Mismatch Calibration Technique in Image-Reject RF Receiver

  • Lee, Mi-Young;Yoo, Chang-Sik
    • Journal of electromagnetic engineering and science
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    • v.10 no.1
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    • pp.25-27
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    • 2010
  • This paper presents a gain and phase mismatch calibration technique for an image-reject RF receiver. The gain mismatch is calibrated by directly measuring the output signal amplitudes of two signal paths. The phase mismatch is calibrated by measuring the output amplitude of the final IF output at the image band. The calibration of the gain and phase mismatch is performed at power-up, and the normal operation of the RF receiver does not interfere with the mismatch calibration circuit. To verify the proposed technique, a 2.4-GHz Weaver image-reject receiver with the gain and phase mismatch calibration circuit is implemented in a 0.18-${\mu}m$ CMOS technology. The overall receiver achieves a voltage gain of 45 dB and a noise figure of 4.8 dB. The image rejection ratio(IRR) is improved from 31 dB to 59.76 dB even with 1 dB and $5^{\circ}$ mismatch in gain and phase, respectively.

A 10-b 500 MS/s CMOS Folding A/D Converter with a Hybrid Calibration and a Novel Digital Error Correction Logic

  • Jun, Joong-Won;Kim, Dae-Yun;Song, Min-Kyu
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.12 no.1
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    • pp.1-9
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    • 2012
  • A 10-b 500 MS/s A/D converter (ADC) with a hybrid calibration and error correction logic is described. The ADC employs a single-channel cascaded folding-interpolating architecture whose folding rate (FR) is 25 and interpolation rate (IR) is 8. To overcome the disadvantage of an offset error, we propose a hybrid self-calibration circuit at the open-loop amplifier. Further, a novel prevision digital error correction logic (DCL) for the folding ADC is also proposed. The ADC prototype using a 130 nm 1P6M CMOS has a DNL of ${\pm}0.8$ LSB and an INL of ${\pm}1.0$ LSB. The measured SNDR is 52.34-dB and SFDR is 62.04-dBc when the input frequency is 78.15 MHz at 500 MS/s conversion rate. The SNDR of the ADC is 7-dB higher than the same circuit without the proposed calibration. The effective chip area is $1.55mm^2$, and the power dissipates 300 mW including peripheral circuits, at a 1.2/1.5 V power supply.

Capacitive Readout Circuit for Tri-axes Microaccelerometer with Sub-fF Offset Calibration

  • Ouh, Hyun Kyu;Choi, Jungryoul;Lee, Jungwoo;Han, Sangyun;Kim, Sungwook;Seo, Jindeok;Lim, Kyomuk;Seok, Changho;Lim, Seunghyun;Kim, Hyunho;Ko, Hyoungho
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.14 no.1
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    • pp.83-91
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    • 2014
  • This paper presents a capacitive readout circuit for tri-axes microaccelerometer with sub-fF offset calibration capability. A charge sensitive amplifier (CSA) with correlated double sampling (CDS) and digital to equivalent capacitance converter (DECC) is proposed. The DECC is implemented using 10-bit DAC, charge transfer switches, and a charge-storing capacitor. The DECC circuit can realize the equivalent capacitance of sub-fF range with a smaller area and higher accuracy than previous offset cancelling circuit using series-connected capacitor arrays. The readout circuit and MEMS sensing element are integrated in a single package. The supply voltage and the current consumption of analog blocks are 3.3 V and $230{\mu}A$, respectively. The sensitivities of tri-axes are measured to be 3.87 mg/LSB, 3.87 mg/LSB and 3.90 mg/LSB, respectively. The offset calibration which is controlled by 10-bit DECC has a resolution of 12.4 LSB per step with high linearity. The noise levels of tri-axes are $349{\mu}g$/${\sqrt}$Hz, $341{\mu}g$/${\sqrt}$Hz and $411{\mu}g$/${\sqrt}$Hz, respectively.

A Study on the Sensor Calibration of Motion Capture System using PSD Sensor to Improve the Accuracy (PSD 센서를 이용한 모션캡쳐센서의 정밀도 향상을 위한 보정에 관한 연구)

  • Choi, Hun-Il;Jo, Yong-Jun;Ryu, Young-Kee
    • Proceedings of the KIEE Conference
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    • 2004.11c
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    • pp.583-585
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    • 2004
  • In this paper we will deal with a calibration method for low cost motion capture system using psd(position sensitive detection) optical sensor. To measure the incident direction of the light from LED emitted marker, the PSD is used the output current ratio on the electrode of PSD is proportional with the incident position of the light focused by lens. In order to defect the direction of the light, the current output is converted into digital voltage value by opamp circuits peak detector and AD converter with the digital value the incident position is measured. Unfortunately, due to the non-linearly problem of the circuit poor position accuracy is shown. To overcome such problems, we compensated the non-linearly by using least-square fitting method. After compensated the non-linearly in the circuit, the system showed more enhanced position accuracy.

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Development of Portable System for Measuring pH in Blood (휴대용 혈중pH 측정시스템의 구현)

  • 정도운;김우열;배진우;강성철;심윤보;전계록
    • Proceedings of the IEEK Conference
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    • 2001.06e
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    • pp.195-198
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    • 2001
  • We developed the portable blood analysis system, which can be measured pH of the blood. This system is composed to electronic circuit, mechanism, and system software. Electronic circuit is composed to the sensor, pre-amp part, temperature regulation part, fluid sensing part, A/D(analog to digital) conversion part, main and peripheral device processing part. And the mechanism is composed to the flow cell and the liquid flow part. The liquid flow part is consisted of blood and washing control system under the control of the 6-channel solenoid valve and syringe rump. The system software is composed to measurement program, calibration program, washing and diagnostic program. The program of each routine is designed as sequential process for an efficiency. And the portable pH analysis system used two-point calibration method using the two types of corrective liquid. As a result, we obtained the calibration curve and calculated the value of pH. For verifying the system, we confirmed the output voltage of the sensor, and estimated reappearance of system using the standard liquid.

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Pixel-level Current Mirroring Injection with 2-step Bias-current Suppression for 2-D Microbolometer FPAs (이차원 마이크로볼로미터 FPA를 위한 이 단계 바이어스 전류 억제 방식을 갖는 픽셀 단위의 전류 미러 신호취득 회로)

  • Hwang, Chi Ho;Woo, Doo Hyung
    • Journal of the Institute of Electronics and Information Engineers
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    • v.52 no.11
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    • pp.36-43
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    • 2015
  • A pixel-level readout circuit is studied for 2-dimensional microbolometer focal plane arrays (FPAs). A current mirroring injection (CMI) input circuit with 2-step current-mode bias suppression is proposed for a pixel-level architecture with high responsivity and long integration time. The proposed circuit has been designed using a $0.35-{\mu}m$ 2-poly 4-metal CMOS process for a $320{\times}240$ microbolometer array with a pixel size of $50{\mu}m{\times}50{\mu}m$. The proposed 2-step bias-current suppression has sufficiently low calibration error with wide calibration range, and the calibration range and error can be easily optimized by controlling some design parameters. Due to high responsivity and a long integration time of more than 1 ms, the noise equivalent temperature difference (NETD) of the proposed circuit can be improved to 26 mK, which is much better than that of the conventional circuits, 67 mK.

Calibration of an Optical Pick-up Performance Evaluator (광 픽업 성능 평가기 캘리브레이션)

  • Ryoo, Jung Rae;Doh, Tae-Yong
    • Journal of Institute of Control, Robotics and Systems
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    • v.20 no.5
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    • pp.578-583
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    • 2014
  • Optical pick-up is a core component for data read/write operations in optical disc drives, and an optical pick-up performance evaluator is an instrument used to analyze the overall performance of an optical pick-up. Due to inevitable errors in an analog measurement circuit, resultant evaluation data is not guaranteed to be accurate. In this paper, a calibration method for an optical pick-up performance evaluator is proposed to ensure evaluation accuracy. Measured data is corrected by a 1st order correction function, and a calibration process based on least-square method is utilized to obtain correction coefficients of the correction function. The proposed calibration method is applied to experiments, and enhanced accuracy is presented with resultant evaluation data.