• 세라미스트
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• 제21권1호
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• pp.44-54
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• 2018

Oxide semiconductor has been spotlighted as a channel material of TFTs in AMLCD as an alternative to Si, due to high mobility ( > $5cm^2/Vs$). It is also one of the strong candidates for TFTs in AMOLED because of high bias stability at amorphous phase. Beyond the advantages mentioned above, oxide semiconductor has many strengths such as transparency, low fabrication temperature and relatively low fabrication cost. For those reasons, the application of oxide semiconductor is not limited to display but can be extended to new types of electronics, for example, transient electronics for human implantable devices. From this context, oxide materials that have been used as semiconductor and insulator at transient electronics are investigated respectively, and conductor and substrate candidates are also explained, since transient electronics require systematic consideration beyond individual oxide films.

• International journal of advanced smart convergence
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• 제1권1호
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• pp.61-64
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• 2012

The ultraviolet and visible light responsive properties of the amorphous indium gallium zinc oxide thin film transistor have been investigated. Amorphous indium gallium zinc oxide (a-IGZO) thin film transistor operate in the enhancement mode with saturation mobility of $6.99cm^2/Vs$, threshold voltage of 13.5 V, subthreshold slope of 1.58 V/dec and an on/off current ratio of $2.45{\times}10^8$. The transistor was subsequently characterized in respect of visible light and UV illuminations in order to investigate its potential for possible use as a detector. The performance of the transistor is indicates a high-photosensitivity in the off-state with a ratio of photocurrent to dark current of $5.74{\times}10^2$. The obtained results reveal that the amorphous indium gallium zinc oxide thin film transistor can be used to fabricate UV photodetector operating in the 366 nm.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2012년도 제43회 하계 정기 학술대회 초록집
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• pp.287-287
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• 2012

최근 투명 산화물 반도체(TOS: Transparent Oxide Semiconductor)중에 비정질 산화물 반도체(amorphous oxide semiconductor)를 이용한 트랜지스터 연구가 활발히 진행되고 있다. 비정질 산화물 반도체는 박막 트렌지스터 소자의 Active Layer으로 사용할 수 있다. 본 연구는 RF magnetron sputtering법으로 유리기판 위에 IGZO박막을 증착하였다. 박막 증착 조건은 초기 압력 $3.0{\times}10^{-6}$ Torr, 증착 압력 20 mTorr, 반응가스 Ar 50 sccm, RF power 30w, 증착 온도는 실온으로 고정하였으며, 공정변수로 증착 시간을 변화시키며 IGZO박막을 증착하였다. IGZO 타겟은 $In_2O_3$, $Ga_2O_3$, ZnO 분말을 각각 1:1:1 mol% 조성비로 혼합하여 소결한 타겟을 사용하였다. XRD 분석결과에 따라서 Bragg's 법칙을 만족하는 피크가 나타나지 않는 비정질 구조임을 확인할 수 있었다. 가시광 영역에서(450~700 nm) 모든 박막은 90% 이상 투과도를 나타내었다. 증착시간이 증가할수록 밴드갭이 감소하는 것을 확인하였다. 증착시간이 5분인 경우 캐리어 농도는 $2.2{\times}10^{19}$ $cm^{-3}$, 이동도는 7.5 $cm^2/V-s$, 비저항은 $3.8{\times}10^{-2}{\Omega}$-cm의 반도체 특성을 나타냈고, 박막 트렌지스터 소자의 Active Layer으로 사용할 수 있다.

• Transactions on Electrical and Electronic Materials
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• 제17권6호
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• pp.380-382
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• 2016

The mechanism for instability under PBS (positive bias stress) in amorphous SIZO (Si-In-Zn-O) thin-film transistors was investigated by analyzing the charge trapping mechanism. It was found that the bulk traps in the SIZO channel layer and the channel/dielectric interfacial traps are not created during the PBS duration. This result suggests that charge trapping in gate dielectric, and/or in oxide semiconductor bulk, and/or at the channel/dielectric interface is a more dominant mechanism than the creation of defects in the SIZO-TFTs.

• 한국전기전자재료학회논문지
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• 제24권9호
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• pp.693-696
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• 2011

Recently, amorphous oxide semiconductors (AOSs) based thin-film transistors (TFTs) have received considerable attention for application in the next generation displays industry. The research trends of AOSs based TFTs investigation have focused on the high device performance. The electrical properties of the TFTs are influenced by trap density. In particular, the threshold voltage ($V_{th}$) and subthreshold swing (SS) essentially depend on the semiconductor/gate-insulator interface trap. In this article, we investigated the effects of Ar plasma-treated $SiO_2$ insulator on the interfacial property and the device performances of amorphous indium gallium zinc oxide (a-IGZO) TFTs. We report on the improvement in interfacial characteristics between a-IGZO channel layer and gate insulator depending on Ar power in plasma process, since the change of treatment power could result in different plasma damage on the interface.

• Transactions on Electrical and Electronic Materials
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• 제18권5호
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• pp.250-252
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• 2017

High-performance full swing logic inverters were fabricated using amorphous 1 wt% Si doped indium-zinc-oxide (a-SIZO) thin films with different channel layer thicknesses. In the inverter configuration, the threshold voltage was adjusted by varying the thickness of the channel layer. The depletion mode (D-mode) device used a TFT with a channel layer thickness of 60 nm as it exhibited the most negative threshold voltage (-1.67 V). Inverters using enhancement mode (E-mode) devices were fabricated using TFTs with channel layer thicknesses of 20 or 40 nm with excellent subthreshold slope (S.S). Both the inverters exhibited high voltage gain values of 30.74 and 28.56, respectively at $V_{DD}=15V$. It was confirmed that the voltage gain can be improved by increasing the S.S value.

• 한국재료학회지
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• 제1권3호
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• pp.125-131
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• 1991

pMOS소자의 $p^{+}$게이트 전극으로 다결정실리콘과 비정질실리콘을 사용하여 고온의 열처리 공정에 따른 붕소이온의 침투현상을 high frequency C-V plot, Constant Current Stress Test(CCST), Secondary Ion Mass Spectroscopy(SIMS) 및 Transmission Electron Microscopy(TEM)를 이용하여 비교하였다. C-V plot분석 결과 비정질실리콘 게이트가 다결정실리콘 게이트에 비해 flatband전압의 변화가 작게 나타났으며, 게이트 산화막의 절연파괴 전하밀도에서는 60~80% 정도 향상된 값을 나타내었다. 비정질실리콘 게이트는 증착시 비정질로 형성되는 구조로 인한 얇은 이온주입 깊이와 열처리 공정시 다결정실리콘에 비교하여 크게 성장하는 입자 크기 때문에 붕소이온의 침투 경로가 되는 grain boundary를 감소시켜 붕소이온 확산을 억제한 것으로 생각된다. Electron trapping rate와 flatband 전압 변화와의 관계에 대하여 고찰하였다.

• Transactions on Electrical and Electronic Materials
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• 제16권2호
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• pp.99-102
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• 2015

Thin film transistors (TFTs) with amorphous 2 wt% silicon-doped zinc tin oxide (a-2SZTO) channel layer were fabricated using an RF magnetron sputtering system, and the effect of post-annealing treatment time on the structural and electrical properties of a-2SZTO systems was investigated. It is well known that Si can effectively reduce the generation of oxygen vacancies. However, it is interesting to note that prolonged annealing could have a bad effect on the roughness of a-2SZTO systems, since the roughness of a-2SZTO thin films increases in proportion to the thermal annealing treatment time. Thermal annealing can control the electrical characteristics of amorphous oxide semiconductor (AOS) TFTs. It was observed herein that prolonged annealing treatment can cause bumpy roughness, which led to increase of the contact resistance between the electrode and channel. Thus, it was confirmed that deterioration of the electrical characteristics could occur due to prolonged annealing. The longer annealing time also decreased the field effect mobility. The a-2SZTO TFTs annealed at 500℃ for 2 hours displayed the mobility of 2.17 cm²/Vs. As the electrical characteristics of a-2SZTO annealed at a fixed temperature for long periods were deteriorated, careful optimization of the annealing conditions for a-2SZTO, in terms of time, should be carried out to achieve better performance.

• Transactions on Electrical and Electronic Materials
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• 제17권4호
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• pp.235-237
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• 2016

Oxide/metal/oxide (OMO) thin films were fabricated using amorphous indium-gallium-zinc-oxide (a-IGZO) and an Ag metal layer on a glass substrate at room temperature. The optical and electrical properties of the a-IGZO/Ag/a-IGZO samples changed systemically depending on the thickness of the Ag layer. The transmittance in the visible range tends to decrease as the Ag thickness increases while the resistivity, carrier concentration, and Hall mobility tend to improve. The a-IGZO/Ag (13 nm)/a-IGZO thin film with the optimum Ag thickness showed an average transmittance (T_av) of 71.7%, resistivity of 6.63 × 10⁻⁵ Ω·cm and Hall mobility of 15.22 cm²V⁻¹s⁻¹.

• 한국재료학회지
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• 제26권6호
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• pp.342-346
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• 2016

To observe the bonding structure and electrical characteristics of a GZO oxide semiconductor, GZO was deposited on ITO glasses and annealed at various temperatures. GZO was found to change from crystal to amorphous with increasing of the annealing temperatures; GZO annealed at $200^{\circ}C$ came to have an amorphous structure that depended on the decrement of the oxygen vacancies; increase the mobility due to the induction of diffusion currents occurred because of an increment of the depletion layer. The increasing of the annealing temperature caused a reduction of the carrier concentration and an increase of the bonding energy and the depletion layer; therefore, the large potential barrier increased the diffusion current dna the Hall mobility. However, annealing temperatures over $200^{\circ}C$ promoted crystallinity by the defects without oxygen vacancies, and then degraded the depletion layer, which became an Ohmic contact without a potential barrier. So the current increased because of the absence of a potential barrier.