• Korean Journal of Materials Research
• /
• v.28 no.12
• /
• pp.709-713
• /
• 2018

To improve the etch rate of $Si_3N_4$ thin film, $H_2SiF_6$ is added to increase etching rate by more than two times. $SiO_3H_2$ is gradually added to obtain a selectivity of 170: 1 at 600 ppm. Moreover, when $SiO_3H_2$ is added, the etching rate of the $SiO_2$ thin film increases in proportion to the radius of the wafer. In $Si_3N_4$ thin film, there is no difference in the etching rate according to the position. However, in the $SiO_2$ thin film, the etching rate increases in proportion to the radius. At the center of the wafer, the re-growth phenomenon is confirmed at a specific concentration or above. The difference in etch rates of $SiO_2$ thin films and the reason for regrowth at these positions are interpreted as the result of the flow rate of the chemical solution replaced with fresh solution.

• 한국정보디스플레이학회:학술대회논문집
• /
• 2005.07b
• /
• pp.940-943
• /
• 2005

The characteristics of a-Si:H TFTs with silicon oxide as passivation layer were reported. It was studied that the insulating characteristics and step coverage characteristics of low temperature silicon oxide before applying to a-Si:H TFT fabrications. With the optimum deposition conditions considering electrical and deposition characteristics, low temperature silicon oxide was applied to a-Si:H TFTs. The changes in characteristics of a-Si:H TFTs were analyzed after replacing silicon nitride passivation layer with low temperature silicon oxide layer. This low temperature silicon oxide can be adapted to high resolution a-Si:H TFT LCD panels.

• Journal of the Korean Vacuum Society
• /
• v.17 no.6
• /
• pp.528-537
• /
• 2008

60 nm and 20 nm thick hydrogenated amorphous silicon(a-Si:H) layers were deposited on 200 nm $SiO_2$/single-Si substrates by inductively coupled plasma chemical vapor deposition(ICP-CVD). Subsequently, 30 nm-Ni layers were deposited by an e-beam evaporator. Finally, 30 nm-Ni/(60 nm and 20 nm) a-Si:H/200 nm-$SiO_2$/single-Si structures were prepared. The prepared samples were annealed by rapid thermal annealing(RTA) from $200^{\circ}C$ to $500^{\circ}C$ in $50^{\circ}C$ increments for 40 sec. A four-point tester, high resolution X-ray diffraction(HRXRD), field emission scanning electron microscopy(FE-SEM), transmission electron microscopy(TEM), and scanning probe microscopy(SPM) were used to examine the sheet resistance, phase transformation, in-plane microstructure, cross-sectional microstructure, and surface roughness, respectively. The nickel silicide from the 60 nm a-Si:H substrate showed low sheet resistance from $400^{\circ}C$ which is compatible for low temperature processing. The nickel silicide from 20 nm a-Si:H substrate showed low resistance from $300^{\circ}C$. Through HRXRD analysis, the phase transformation occurred with silicidation temperature without a-Si:H layer thickness dependence. With the result of FE-SEM and TEM, the nickel silicides from 60 nm a-Si:H substrate showed the microstructure of 60 nm-thick silicide layers with the residual silicon regime, while the ones from 20 nm a-Si:H formed 20 nm-thick uniform silicide layers. In case of SPM, the RMS value of nickel silicide layers increased as the silicidation temperature increased. Especially, the nickel silicide from 20 nm a-Si:H substrate showed the lowest RMS value of 0.75 at $300^{\circ}C$.

• Journal of the Korean Crystal Growth and Crystal Technology
• /
• v.17 no.2
• /
• pp.47-51
• /
• 2007

F-doped SiOC : H thin films with low refractive index were deposited on Si wafer and glass substrate by plasma enhanced chemical vapor deposition (PECVD) as a function of rf powers, substrate temperatures, gas rates and their composition flow ratios ($SiH_4,\;CF_4$ and $N_2O$). The refractive index of the F-doped SiOC : H film continuously decreased with increasing deposition temperature and rf power. As $N_2O$ gas flow rate decreased, the refractive index of the deposited films decreased down to 1.3778, reaching a minimum value at rf power of 180W and $100^{\circ}C$ without $N_2O$ gas. The fluorine content of F-doped SiOC : H film increased from 1.9 at% to 2.4 at% as the rf power was increased from 60 W to 180 W, which results in the decrease of refractive index.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
• /
• v.13 no.10
• /
• pp.817-821
• /
• 2000

In this work, we have investigated the dependence of annealing temperature(T$\_$a/) on optical and electrical properties of amorphous hydrogenated SiC(a-SiC:H) films. The a-SiC:H films were deposited on corning glass and p-type Si(100) wafer by PECVD (plasma enhanced vapor deposition) using SiH$_4$+CH$_4$+N$_2$ gas mixture. The experimental results have shown that the optical energy band gap(E$\_$opt/)of the thin films annealed at high temperatures have shown that the graphitization of carbon clusters and micro-crystalline silicon occurs. The current-voltage characteristics have shown good electrical properties at the annealed films.

• Transactions on Electrical and Electronic Materials
• /
• v.1 no.2
• /
• pp.7-11
• /
• 2000

a-Si:H and poly-Si TFT(thin film transistor) characteristics were investigated using an inverted staggered type TFT. The TFT an as-grown a-Si:H exhibited a low field effect mobility, transconductance, and high gate threshold voltage. The poly-Si films were achieved by using an isothermal and RTA treatment for glow discharge deposited a-Si:H films. The a-Si:H films were cystallized at the various temperature from 600$^{\circ}C$ to 1000$^{\circ}C$. As anneal temperature was elevated, the TFT exhibited increased g$\sub$m/ and reduced V$\sub$ds/. V$\sub$T/. The poly-Si grain boundary passivation with grain boundary trap types and activation energies as a function of anneal temperature. The poly-si TFT showed an improved I$\sub$nm//I$\sub$off/ ratio of 10$\^$6/, reduced gate threshold voltage, and increased field effect mobility by three orders.

• Journal of the Korean Crystal Growth and Crystal Technology
• /
• v.7 no.3
• /
• pp.393-399
• /
• 1997

H-SiC single crystals were successfully grown by the sublimation method and the optimum growth conditions were established. The grown SiC crystals were about 33 mm in diameter and 11 mm in length. The micropipe density of the polished SiC wafers was 400/$\textrm{cm}^2$, and the planar defect density was 50/$\textrm{cm}^2$. Raman spectroscopy and DCXRD analysis were used to examine the crystallinity of Acheson seeds and the 6H-SiC wafers. As a result, the crystallinity of the 6H-SiC wafers was better than that of Acheson seeds. For examination of the electrical properties of the undopped 6H-SiC wafers Hall measurements were applied. According to the measurements the carrier concentration was estimated to be $3.91{\times}10^{15}/\textrm {cm}^3$ and doping type of the undopped. 6H-SiC wafers was n-type.

• 한국신재생에너지학회:학술대회논문집
• /
• 2011.05a
• /
• pp.129.1-129.1
• /
• 2011

a-Si:H/c-Si 구조의 이종접합 태양전지 전면 투명전도막으로 Indium tin oxide(ITO) 박막의 조건에 따라 태양전지 특성을 연구하였다. ITO 박막은 파우더 타겟으로 마그네트론 스퍼터링 방식으로 성막하였고, 증착 온도(Ts)에 따라 전기적, 광학적 특성을 비교, 분석하였다. 기판 증착 온도가 증가할수록 박막의 저항이 낮아지는 것으로 나타났으며 $350^{\circ}C$ 조건에서 가장 낮은 저항($34.2{\Omega}$/sq)을 보였다. 투과도 또한 기판 증착 온도가 올라갈수록 전반적인 향상을 나타냈다. a-Si:H/c-Si 기판의 MCLT(minority carrier lifetime)는 $350^{\circ}C$에서 최적($359{\mu}s$)의 결과를 나타냈다. 그 이상의 기판 온도에서는 오히려 감소하였는데, 이는 높은 온도에서의 a-Si:H/c-Si 계면의 열손상으로 판단된다.

• Journal of the Korean Crystal Growth and Crystal Technology
• /
• v.9 no.3
• /
• pp.303-308
• /
• 1999

As a semiconductor material for electronic devices operated under extreme environmental conditions, silicon carbides(SiCs) have been intensively studied because of their excellent electrical, thermal and other physical properties. The growth characteristics of single-crystalline 4H-SiC homoepitaxial layers grown by a thermal chemical vapor deposition (CVD) were investigated. Especially, the successful growth condition of 4H-SiC homoepitaxial layers using a SiC-uncoated atmospheric pressure chamber and carried out using off-oriented substrates prepared by a modified Lely method. In order to investigate the crystallinity of grown epilayers, Nomarski optical microscopy, Raman spectroscopy, photoluninescence(PL), scanning electron microscopy(SEM) and other techniques were utilized. The best quality of 4H-SiC homoepitaxial layers was observed in conditions of growth temperature $1500^{\circ}C$ and C/Si flow ratio 2.0 of $C_{3}H_{8}\;0.2\;sccm\;&\;SiH_{4}\;0.3\;sccm$. The growth rate of epilayers was about $1.0\mu\textrm{m}/h$ in the above growth condition.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.40 no.7
• /
• pp.481-485
• /
• 2003

Amorphous silicon (a-Si:H) based TFT process has been studied at the maximum temperature of 15$0^{\circ}C$ with 25${\mu}{\textrm}{m}$ thick flexible and adhesive tape type polyimide foil substrate, which has benefit on handling a rugged, flexible plastic substrate trough sticking simply it to glass. This paper summarize the process procedure of the TFT on the plastic substrate and shows its electrical characteristics in comparison with glass substrate using primarily the ON/OFF current ratio and the field effect mobility as the quality criterion. The a-SiN:H coating layer played an important role in decreasing surface roughness of plastic substrate, so leakage current of TFT was decreased and mobility was increased. The results show that high quality a-Si:H TFTs can be fabricated on the plastic substrates through coating a rough plastic surface with a-SiN:H.