• Title/Summary/Keyword: Zinc-tin oxide TFT

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In 분포에 따른 a-IGZO TFT의 안정성 평가

  • Gang, Ji-Yeon;Lee, Tae-Il;Lee, Min-Jeong;Myeong, Jae-Min
    • Proceedings of the Materials Research Society of Korea Conference
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    • 2011.05a
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    • pp.60.1-60.1
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    • 2011
  • 비정질 indium-gallium-zinc-oxide (a-IGZO)는 thin film transistor (TFT)에 적용되는 대표적인 active layer로써 높은 이동도를 갖고, 도핑 농도의 제어가 용이하며 낮은 온도에서도 대면적에 증착할 수 있는 특성을 가지고 있다. 특히 저온에서 대면적 증착이 가능한 장점을 갖고 있어 LCD 분야뿐만 아니라 다양한 분야에서 상용화하려는 연구가 시도되고 있다. a-IGZO를 구성하는 물질 중에 이동도에 중요한 역할을 미치는 In은 대표적인 투명전극물질인 indium-tin oxide (ITO)에서 고전류 구동에 의한 확산이 널리 알려져 이에 대한 증명과 개선을 위한 연구가 진행되고 있다. 보고된 결과에 따르면 device에 지속적인 구동 전압을 가했을 때 In이 유기층로 확산되어 organic light emitting diode(OLED)의 성능을 저하시키는 것으로 알려져 있다. 따라서, a-IGZO에서도 고전류 구동에 의한 indium의 이동이 필수불가결하다고 판단된다. 본 연구에서는 a-IGZO TFT에 고전압 구동을 반복적으로 시행함으로써 발생하는 전기적 특성의 변화를 확인하였고, 동일한 소자의 전극과 채널 사이의 계면에서 In 분포를 energy dispersive spectrometer (EDS)로 관찰하여 In 분포와 전기적 특성 간의 상관관계에 대해 연구하였다.

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Channel Protection Layer Effect on the Performance of Oxide TFTs

  • KoPark, Sang-Hee;Cho, Doo-Hee;Hwang, Chi-Sun;Yang, Shin-Hyuk;Ryu, Min-Ki;Byun, Chun-Won;Yoon, Sung-Min;Cheong, Woo-Seok;Cho, Kyoung-Ik;Jeon, Jae-Hong
    • ETRI Journal
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    • v.31 no.6
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    • pp.653-659
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    • 2009
  • We have investigated the channel protection layer (PL) effect on the performance of an oxide thin film transistor (TFT) with a staggered top gate ZnO TFT and Al-doped zinc tin oxide (AZTO) TFT. Deposition of an ultra-thin PL on oxide semiconductor films enables TFTs to behave well by protecting the channel from a photo-resist (PR) stripper which removes the depleted surface of the active layer and increases the carrier amount in the channel. In addition, adopting a PL prevents channel contamination from the organic PR and results in high mobility and small subthreshold swings. The PL process plays a critical role in the performance of oxide TFTs. When a plasma process is introduced on the surface of an active layer during the PL process, and as the plasma power is increased, the TFT characteristics degrade, resulting in lower mobility and higher threshold voltage. Therefore, it is very important to form an interface using a minimized plasma process.

Highly stable Zn-In-Sn-O TFTs for the Application of AM-OLED Display

  • Ryu, Min-Ki;KoPark, Sang-Hee;Yang, Shin-Hyuk;Cheong, Woo-Seok;Byun, Chun-Won;Chung, Sung-Mook;Kwon, Oh-Sang;Park, Eun-Suk;Jeong, Jae-Kyeong;Cho, Kyoung-Ik;Cho, Doo-Hee;Lee, Jeong-Ik;Hwang, Chi-Sun
    • 한국정보디스플레이학회:학술대회논문집
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    • 2009.10a
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    • pp.330-332
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    • 2009
  • Highly stable bottom gate thin film transistors(TFTs) with a zinc indium tin oxide(Zn-In-Sn-O:ZITO) channel layer have been fabricated by rf-magnetron co-sputtering using a indium tin oxide(ITO:90/10), a tin oxide and a zinc oxide targets. The ZITO TFT (W/L=$40{\mu}m/20{\mu}m$) has a mobility of 24.6 $cm^2$/V.s, a subthreshold swing of 0.12V/dec., a turn-on voltage of -0.4V and an on/off ratio of >$10^9$. When gate field of $1.8{\times}10^5$ V/cm was applied with source-drain current of $3{\mu}A$ at $60^{\circ}C$, the threshold voltage shift was ~0.18 V after 135 hours. We fabricated AM-OLED driven by highly stable bottom gate Zn-In-Sn-O TFT array.

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Improved Bias Stress Stability of Solution Processed ITZO/IGZO Dual Active Layer Thin Film Transistor

  • Kim, Jongmin;Cho, Byoungdeog
    • Proceedings of the Korean Vacuum Society Conference
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    • 2015.08a
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    • pp.215.2-215.2
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    • 2015
  • We fabricated dual active layer (DAL) thin film transistors (TFTs) with indium tin zinc oxide (ITZO) and indium gallium zinc oxide (IGZO) thin film layers using solution process. The ITZO and IGZO layer were used as the front and back channel, respectively. In order to investigate the bias stress stability of ITZO SAL (single active layer) and ITZO/IGZO DAL TFT, a gate bias stress of 10 V was applied for 1500 s under the dark condition. The SAL TFT composed of ITZO layer shows a poor positive bias stability of ${\delta}VTH$ of 13.7 V, whereas ${\delta}VTH$ of ITZO/IGZO DAL TFT was very small as 2.6 V. In order to find out the evidence of improved bias stress stability, we calculated the total trap density NT near the channel/gate insulator interface. The calculated NT of DAL and SAL TFT were $4.59{\times}10^{11}$ and $2.03{\times}10^{11}cm^{-2}$, respectively. The reason for improved bias stress stability is due to the reduction of defect sites such as pin-hole and pores in the active layer.

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Novel Oxide Thin Film Transistors for Transparent AMOLED

  • Cho, Doo-Hee;Yang, Shin-Hyuk;Byun, Chun-Won;Lee, Jeong-Ik;Hwang, Chi-Sun;Kopark, Sang-Hee;Chu, Hye-Yong;Cho, Kyoung-Ik
    • 한국정보디스플레이학회:학술대회논문집
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    • 2008.10a
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    • pp.1101-1104
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    • 2008
  • We have fabricated the transparent TFTs using new oxide material (AZTO: Al-doped zinc tin oxide) as an active layer. The AZTO TFT showed good performance without post-annealing. The electrical characteristics were improved by the post-annealing up to $300^{\circ}C$. The AZTO TFTs exhibited a mobility of $8{\sim}12\;cm^2/Vs$, a sub-threshold swing of 0.2~0.6 V/dec, and an on/off ratio of more than $10^9$.

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The Influence of Silicon Doping on Electrical Characteristics of Solution Processed Silicon Zinc Tin Oxide Thin Film Transistor

  • Lee, Sang Yeol;Choi, Jun Young
    • Transactions on Electrical and Electronic Materials
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    • v.16 no.2
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    • pp.103-105
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    • 2015
  • Effect of silicon doping into ZnSnO systems was investigated using solution process. Addition of silicon was used to suppress oxygen vacancy generation. The transfer characteristics of the device showed threshold voltage shift toward the positive direction with increasing Si content due to the high binding energy of silicon atoms with oxygen. As a result, the carrier concentration was decreased with increasing Si content.

Performance of Solution Processed Zn-Sn-O Thin-film Transistors Depending on Annealing Conditions

  • Han, Sangmin;Lee, Sang Yeol;Choi, Jun Young
    • Transactions on Electrical and Electronic Materials
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    • v.16 no.2
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    • pp.62-64
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    • 2015
  • We have investigated zinc tin oxide (ZTO) thin films under various silicon ratios. ZTO TFTs were fabricated by solution processing with the bottom gate structure. Furthermore, annealing process was performed at different temperatures in various annealing conditions, such as air, vacuum and wet ambient. Completed fabrication of ZTO TFT, and the performance of TFT has been compared depending on the annealing conditions by measuring the transfer curve. In addition, structure in ZTO thin films has been investigated by X-ray diffraction spectroscopy (XRD) and Scanning electron microscope (SEM). It is confirmed that the electrical performance of ZTO TFTs are improved by adopting optimized annealing conditions. Optimized annealing condition has been found for obtaining high mobility.

Enhanced Electrical Performance of SiZnSnO Thin Film Transistor with Thin Metal Layer

  • Lee, Sang Yeol
    • Transactions on Electrical and Electronic Materials
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    • v.18 no.3
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    • pp.141-143
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    • 2017
  • Novel structured thin film transistors (TFTs) of amorphous silicon zinc tin oxide (a-SZTO) were designed and fabricated with a thin metal layer between the source and drain electrodes. A SZTO channel was annealed at $500^{\circ}C$. A Ti/Au electrode was used on the SZTO channel. Metals are deposited between the source and drain in this novel structured TFTs. The mobility of the was improved from $14.77cm^2/Vs$ to $35.59cm^2/Vs$ simply by adopting the novel structure without changing any other processing parameters, such as annealing condition, sputtering power or processing pressure. In addition, stability was improved under the positive bias thermal stress and negative bias thermal stress applied to the novel structured TFTs. Finally, this novel structured TFT was observed to be less affected by back-channel effect.

Optimization of Amorphous Indium Gallium Zinc Oxide Thin Film for Transparent Thin Film Transistor Applications

  • Shin, Han Jae;Lee, Dong Ic;Yeom, Se-Hyuk;Seo, Chang Tae
    • Proceedings of the Korean Vacuum Society Conference
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    • 2014.02a
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    • pp.352.1-352.1
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    • 2014
  • Indium Tin Oxide (ITO) films are the most extensively studied and commonly used as ones of TCO films. The ITO films having a high electric conductivity and high transparency are easily fabricated on glass substrate at a substrate temperature over $250^{\circ}C$. However, glass substrates are somewhat heavy and brittle, whereas plastic substrates are lightweight, unbreakable, and so on. For these reasons, it has been recently suggested to use plastic substrates for flexible display application instead of glass. Many reaearchers have tried to produce high quality thin films at rood temperatures by using several methods. Therefore, amorphous ITO films excluding thermal process exhibit a decrease in electrical conductivity and optical transparency with time and a very poor chemical stability. However the amorphous Indium Gallium Zinc Oxide (IGZO) offers several advantages. For typical instance, unlike either crystalline or amorphous ITO, same and higher than a-IGZO resistivity is found when no reactive oxygen is added to the sputter chamber, this greatly simplifies the deposition. We reported on the characteristics of a-IGZO thin films were fabricated by RF-magnetron sputtering method on the PEN substrate at room temperature using 3inch sputtering targets different rate of Zn. The homogeneous and stable targets were prepared by calcine and sintering process. Furthermore, two types of IGZO TFT design, a- IGZO source/drain material in TFT and the other a- ITO source/drain material, have been fabricated for comparison with each other. The experimental results reveal that the a- IGZO source/drain electrode in IGZO TFT is shown to be superior TFT performances, compared with a- ITO source/drain electrode in IGZO TFT.

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Amorphous Indium-Tin-Zinc-Oxide (ITZO) Thin Film Transistors

  • Jo, Gwang-Min;Lee, Gi-Chang;Seong, Sang-Yun;Kim, Se-Yun;Kim, Jeong-Ju;Lee, Jun-Hyeong;Heo, Yeong-U
    • Proceedings of the Korean Vacuum Society Conference
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    • 2010.08a
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    • pp.170-170
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    • 2010
  • Thin-film transistors (TFT) have become the key components of electronic and optoelectronic devices. Most conventional thin-film field-effect transistors in display applications use an amorphous or polycrystal Si:H layer as the channel. This silicon layers are opaque in the visible range and severely restrict the amount of light detected by the observer due to its bandgap energy smaller than the visible light. Therefore, Si:H TFT devices reduce the efficiency of light transmittance and brightness. One method to increase the efficiency is to use the transparent oxides for the channel, electrode, and gate insulator. The development of transparent oxides for the components of thin-film field-effect transistors and the room-temperature fabrication with low voltage operations of the devices can offer the flexibility in designing the devices and contribute to the progress of next generation display technologies based on transparent displays and flexible displays. In this thesis, I report on the dc performance of transparent thin-film transistors using amorphous indium tin zinc oxides for an active layer. $SiO_2$ was employed as the gate dielectric oxide. The amorphous indium tin zinc oxides were deposited by RF magnetron sputtering. The carrier concentration of amorphous indium tin zinc oxides was controlled by oxygen pressure in the sputtering ambient. Devices are realized that display a threshold voltage of 4.17V and an on/off ration of ${\sim}10^9$ operated as an n-type enhancement mode with saturation mobility with $15.8\;cm^2/Vs$. In conclusion, the fabrication and characterization of thin-film transistors using amorphous indium tin zinc oxides for an active layer were reported. The devices were fabricated at room temperature by RF magnetron sputtering. The operation of the devices was an n-type enhancement mode with good saturation characteristics.

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