• 제목/요약/키워드: Wafer Shape

검색결과 135건 처리시간 0.041초

Meltback을 이용한 mesa shape의 형성과 평면매립형 반도체레이저의 제작 (The mesa formation and fabrication of planar buried heterostructure laser diode by using meltback method)

  • 황상구;오수환;김정호;김운섭;김동욱;홍창희
    • 한국광학회지
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    • 제10권6호
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    • pp.518-523
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    • 1999
  • 본 연구에서는 meltback 방법으로 mesa 모양을 형성하기 위하여 여러 가지 농도의 용액으로 meltback을 하였으며 InP 기판위에 InGaAsP 활성층과 InP cap층을 가지는 웨이퍼에 mesa 모양을 형성하기 위해서는 성장온도에서 성장용액의 80%인 InGaAsP(1.55$\mu$m)용액이 가장 적합한 것으로 확인되었다. meltback 방법만으로 PBH-LD(planar buried heterosturcture laser diode)를 제작하기 위한 완전한 mesa를 형성하기는 어려우며, 따라서 본 연구에서는 화학에칭에 이어 Meltback 방법을 이용하여 mesa 모양을 형성하고 연속하여 전류 차단층을 형성시킨 PBH-LD(planar buried heterosturcture laser diode)를 제작하였다. 이렇게 제작된 MQW-PBH-LD의 전기 광학적 특성은 공진기 길이가 $300{\mu}m$일 때 임계전류는 10mA, 내부양자효율은 82%, 내부손실은 $9.2cm^{-1}$, 특성온도는 $25~45^{\circ}C$ 사이에서는 65K, $45~65^{\circ}C$사이에서는 42K이었다.

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고저항 실리콘 기판을 이용한 마이크로 웨이브 인덕터의 제작 (Fabrication of Si monolithic inductors using high resistivity substrate)

  • 박민;현영철;김천수;유현규;구진근;남기수;이성현
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 1996년도 추계학술대회 논문집
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    • pp.291-294
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    • 1996
  • We present the experimental results of high quality factor (Q) inductors fabricated on high-resistivity silicon wafer using standard CMOS process without any modificatons such as thick gold layer or multilayer interconnection. This demonstrates the possibility of building high Q inductors using lower cost technologies, compared with previous results using complicated process. The comparative analysis is carried out to find the optimized inductor shape for the maximum performance by varying the thickness of metal and number of turns with rectangular shape.

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Analysis and Evaluation of Capillary Passive Valves in Microfluidic Systems Using a Centrifugal Force

  • Cho, Han-Sang;Kim, Ho-Young;Kang, Ji-Yoon;Kwak, Seung-Min;Kim, Tae-Song
    • KIEE International Transactions on Electrophysics and Applications
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    • 제4C권4호
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    • pp.155-159
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    • 2004
  • This work reports the theoretical and experimental investigations of capillary bust valves to regulate liquid flow in microchannels. The theoretical analysis uses the Young-Laplace equation and geometrical considerations to predict the pressure at the edge of the valve opening. Numerical simulations are employed to calculate the meniscus shape evolution while the interface is pinned at the valve edge. Microchannels and valves are fabricated using soft lithography. A wafer-rotating system, which can adjust the driving pressure by rotational speed, induces a liquid flow. Experimentally measured valve-bursting pressure agrees with theoretical predictions.

The Effect of Mechanical Properties of Polishing Pads on Oxide CMP ( Chemical Mechanical Planarization )

  • Hong, Yi-Koan;Eom, Dae-Hong;Kang, Young-Jae;Park, Jin-Goo;Kim, Jae-Suk;Kim, Geon;Lee, Ju-Yeol;Park, In-Ha
    • 한국윤활학회:학술대회논문집
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    • 한국윤활학회 2002년도 proceedings of the second asia international conference on tribology
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    • pp.445-446
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    • 2002
  • The purpose of this study was to investigate the effect of micro holes, pattern structure and elastic modulus of pads on the polishing behavior such as the removal rate and WIWNU (within wafer non-uniformity) during CMP. The regular holes on the pad act as the superior abrasive particle's reservoir and regular distributor at the bulk pad, respectively. The superior CMP performance was observed at the laser processed bulk pad with holes. Also, th ε groove pattern shape was very important for the effective polishing. Wave grooved pad showed higher removal rates than K-grooved pad. The removal rate was linearly increased as the top pad's elastic modulus increased.

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Analysis of Characteristics of DLC Coating Thin Film in Tungsten Carbide for Production of Medical Thermal-Infrared Lenses

  • Park, Yong-Pil;Kim, Tae-Gon;Cheon, Min-Woo
    • Transactions on Electrical and Electronic Materials
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    • 제15권6호
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    • pp.344-347
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    • 2014
  • This study was carried out on DLC thin film deposition technology used in infrared optical system production as a method of reducing the shape changes of the molding core and the consequent loss of life. Experiments on the deposition on silicon wafer and tungsten carbide used as a substrate for molding core were conducted at each processing condition using a filtered arc system, and it was found that the surface and mechanical properties were of the greatest quality when the substrate bias voltage of -150 V was used. In addition, it was confirmed that the PV and Ra characteristics were improved by the deposition of the DLC thin film.

FIB를 이용한 DLC소재의 가공공정에 관한 연구 (A Study on the Machining Characteristic of DLC Coated Mold Material Using FIB)

  • 홍원표;최병열;강은구;이석우;최헌종
    • 대한기계학회논문집A
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    • 제33권3호
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    • pp.224-230
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    • 2009
  • FIB has been commonly used as a very powerful tool in the semiconductor industry. It is mainly used for mask repair, device correction, failure analysis and IC error correction, etc. Currently, FIB is not being applied to the fabrication of the micro and nano-structured mold, because of low productivity. And also sputtering rate has been required to fabricate 3D shape. In the paper, we studied the FIB-Sputtering rate according to mold materials. And surface roughness characteristics had been analysed for micro or nano mold fabrication. Si wafer, Glassy Carbon, STAVAX and DLC that have been normally considered as good micro or nano mold materials were used in the study.

Advanced Pad Conditioner Design for Oxide/Metal CMP

  • Hwang Tae-Wook;Baldoni Gary;Tanikella Anand;Puthanangady Thomas
    • Transactions on Electrical and Electronic Materials
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    • 제7권2호
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    • pp.62-66
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    • 2006
  • Advanced CMP conditioner design requires investigations of key conditioner manufacturing parameters and their effects on pad surface and then wafer performance. In the present investigation, diamond shape, concentration, distribution, and other key manufacturing parameters are considered to improve CMP process stability and conditioner life. Self avoiding random distribution ($SARD^{TM}$) of diamond abrasives has been developed and both numerical simulation and experimental results show very stable and reliable polishing performance.

펄스레이저 증착법을 이용한 실리콘 나노와이어 합성 (Synthesis of silicon nanoeires by pulsed laser deposition in furnace)

  • 전경아;손효정;김종훈;이상렬
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2005년도 추계학술대회 논문집 Vol.18
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    • pp.115-116
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    • 2005
  • Si nanowires (NWs) were fabricated in vacuum furnace by using a Nd:YAG pulsed laser with the wavelength of 325 nm. Commercial p-type Si wafer is used for target, and any catalytic materials are not used. Scanning electron microscopy (SEM) images indicate that the diameters of Si NWs ranged from 10 to 150 nm. Si NWs have various size and shape with a substrate position inside a furnace, and their morphologic construction is reproducible. The formation mechanism of the NWs is discussed.

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Cellular Adhesion and Growth on the Vertically Aligned Silicon Nanowire Arrays

  • 윤서영;박이슬;이진석
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2013년도 제45회 하계 정기학술대회 초록집
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    • pp.266.2-266.2
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    • 2013
  • According to advanced nanotechnology, the nanostructured materials with various kinds and shape are synthesized easily or produced by process. Recently, researches about interaction between the nanostructured materials and biological system have been progressed actively. The surface topography may influence cellular responses, for example cell adhesion, cell morphology. In this work, we synthesized vertically aligned silicon nanowires (SiNWs) on the Au-covered Si(111) wafer by chemical vapor deposition (CVD) method. We accomplished to control of the SiNWs diameter by regulating thickness of Au film such as 1 nm and 10 nm. These substrates did not isolate cells and just provided surface topography for cell culture. Human Embryonic Kidney 293T cells (HEK 293T cells) were cultured on these substrates for 2 days. We studied the nanotopographical effects on cell morphology, adhesion, and growth which are evaluated on each SiNWs substrate comparing bare glass as control.

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보간법에 의한 실리콘웨이퍼 단면도 추정 (An estimate of silicon wafer's cross section shape by interpolation)

  • 송은지
    • 한국정보처리학회:학술대회논문집
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    • 한국정보처리학회 2001년도 춘계학술발표논문집 (상)
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    • pp.345-348
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    • 2001
  • 반도체에 이용되는 실리콘웨이퍼 생산에 있어 평탄도는 가장 중요한 요소 중 하나이다. 실리콘웨이퍼의 평탄도는 POLISHING이라는 공정과정을 통하여 측정하고 제어하고 있는데 현재 측정장비에서 보여주는 웨이퍼의 모양을 사람에 의해 제어하고 있어 경험이 필요하고 일일이 사람이 체크해야하는 번거로움이 있다. 따라서 평탄도가 시스템에 의해 자동적으로 측정되고 제어할 필요가 있다. 본 연구는 웨이퍼의 3차원 형상을 측정하여 보여주는 장비에서 이미지와 함께 나타나는 몇 개의 정량적인 항목을 이용하여 웨이퍼의 단면도를 추정하는 알고리즘을 제안함으로 평탄도가 자동으로 측정될 수 있도록 하였다. 이 알고리즘은 Spline보간법을 이용하였고 웨이퍼의 특정단면 뿐만 아니라 임의의 단면도도 추정할 수 있으며 수치실험을 통해 Lagrange보간법과 비교하여 그 효율성을 입증하였다.

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