• 한국산학기술학회논문지
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• 제3권2호
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• pp.74-79
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• 2002

80년대 반도체 산업의 급격한 성장으로 오늘날 반도체 산업은 반도체소자의 초고집접화, 웨이퍼의 대구경화로 발전이 거듭났으며, 소자의 성능과 생산 수율의 향상을 위하여 실리콘 웨이퍼의 세정하는 기술 및 연구를 계속 진행하고 있다. 기존의 반도체 세정은 과다한 화학약품의 사용으로 비 환경친화적이며, 이에 본 연구에서는 기존의 세정방법을 대체하기 위한 방법으로 환경친화적인 전리수를 이용한 반도체 세정법을 하였다. 이때 실리콘 웨이퍼 표면의 원자적 상태의 변화가 발생하여 다양한 방법으로 확인할 수 있다. 본 연구에 서는 이러한 분석을 하기 위하여 기존세정의 화학약품과 전리수로 세정한 웨이퍼의 표면을 비교하였으며, 또한 온도 및 시간별 표면상태변화를 분석하였다. 특히 접촉각 변하에 중점을 두어 변화를 관찰하였으며, 음극수의 경우 17.28°, 양극수의 경우 34.1°의 낮은 접촉각을 얻을 수 있었다.

• 반도체디스플레이기술학회지
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• 제22권4호
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• pp.66-71
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• 2023

This paper describes a hybrid cleaning method of silicon wafer combining nano-bubble and ultrasound to remove sub-micron particles and contaminants with minimal damage to the wafer surface. In the megasonic cleaning process of semiconductor manufacturing, the cavitation induced by ultrasound can oscillate and collapse violently often with re-entrant jet formation leading to surface damage. The smaller size of cavitation bubbles leads to more stable oscillations with more thermal and viscous damping, thus to less erosive surface cleaning. In this study, ultrasonic energy was applied to the wafer surface in the DI water to excite nano-bubbles at resonance to remove contaminant particles from the surface. A patented nano-bubble generator was developed for the generation of nano-bubbles with concentration of 1×10⁹ bubbles/ml and nominal nano-bubble diameter of 150 nm. Ultrasonic nano-bubble technology improved a contaminant removal efficiency more than 97% for artificial nano-sized particles of alumina and Latex with significant reduction in cleaning time without damage to the wafer surface.

• 대한용접접합학회:학술대회논문집
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• 대한용접접합학회 2000년도 특별강연 및 추계학술발표대회 개요집
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• pp.284-286
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• 2000

• 전자공학회논문지CI
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• 제42권5호
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• pp.31-40
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• 2005

본 연구에서는 웨이퍼의 식각, 세정, 연마 공정에 사용되는 매엽식 세정장비의 동작순서의 시뮬레이션과 단위 시간당 처리량 측정 방법에 대해 연구한다. 유한상태기계를 바탕으로 스케쥴링 알고리즘에 따른 로봇의 상태를 정의하여 시뮬레이션 모델을 구축하였으며, 이에 따른 시뮬레이션 수행을 통해 세정장비의 시간당 처리량을 측정하였다. 본 연구에서 제시한 시뮬레이션 기법을 통해 레시피와 로봇의 동작속도에 따라 세정장비의 단위시간당 처리량을 측정하고, 처리량을 극대화 할 수 있는 레시피와 로봇의 동작순서를 찾아낼 수 있다.

• 한국신재생에너지학회:학술대회논문집
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• 한국신재생에너지학회 2010년도 춘계학술대회 초록집
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• pp.99.2-99.2
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• 2010

This paper investigates the dependence of a-Si:H/c-Si passivation and heterojunction solar cell performances on various cleaning processes of silicon wafer and surface morphology. It is observed that passivation quality of a-Si:H thin-films on c-Si wafer highly depends on wafer surface conditions. The MCLT(Minority carrier life time) of wafer incorporating intrinsic (i) a-Si:H as a passivation layer shows sensitive variation with cleaning process and surface morpholgy. By applying improved cleaning processes and surface morphology we can obtain the MCLT of $200{\mu}sec$ after H-termination and above 1.5msec after i a-Si:H thin film deposition, which has implied open circuit voltage of 0.720V.

• 한국재료학회지
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• 제16권2호
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• pp.75-79
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• 2006

The effect of ozone and/or ultrasound treatments on the efficiency of slurry removal in post sliced cleaning (PSC) of silicon ingot was studied. Efficiency of slurry removal was evaluated as functions of time, temperature and surfactant with DOE (Design of Experiment) method. Residual slurries were observed on the wafer surface in case of cleaning by ozone or ultrasound separately. However, a clean wafer surface was appeared when cleaned with ozone and ultrasound simultaneously. It has found that cleaning time was the main effect among temperature, time and surfactant. Elevated temperature, addition of surfactant and high ozone concentration helped to accelerate efficient removal of slurry. The improvement of removal efficiency seems to be related to the formation of more active OH radicals. The highly cleaned surface was achieved at 10 wt% ozone, 1 min and 10 vol% surfactant with ultrasound. Application of ozone and ultrasound might be a useful method for PSC process in wafer cleaning.

• 한국재료학회지
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• 제31권2호
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• pp.97-100
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• 2021

We report the effect of Standard Clean-1 (SC-1) cleaning to remove residual Ti layers after silicidation to prevent Al diffusion into Si wafer for Ti Schottky barrier diodes (Ti-SBD). Regardless of SC-1 cleaning, the presence of oxygen atoms is confirmed by Auger electron spectroscopy (AES) depth profile analysis between Al and Ti-silicide layers. Al atoms at the interface of Ti-silicide and Si wafer are detected, when the SC-1 cleaning is not conducted after rapid thermal annealing. On the other hand, Al atoms are not found at the interface of Ti-SBD after executing SC-1 cleaning. Al diffusion into the interface between Ti-silicide and Si wafer may be caused by thermal stress at the Ti-silicide layer. The difference of the thermal expansion coefficients of Ti and Ti-silicide gives rise to thermal stress at the interface during the Al layer deposition and sintering processes. Although a longer sintering time is conducted for Ti-SBD, the Al atoms do not diffuse into the surface of the Si wafer. Therefore, the removal of the Ti layer by the SC-1 cleaning can prevent Al diffusion for Ti-SBD.

• 한국분말재료학회지
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• 제28권1호
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• pp.25-30
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• 2021

The surface of silicon dummy wafers is contaminated with metallic impurities owing to the reaction with and adhesion of chemicals during the oxidation process. These metallic impurities negatively affect the device performance, reliability, and yield. To solve this problem, a wafer-cleaning process that removes metallic impurities is essential. RCA (Radio Corporation of America) cleaning is commonly used, but there are problems such as increased surface roughness and formation of metal hydroxides. Herein, we attempt to use a chelating agent (EDTA) to reduce the surface roughness, improve the stability of cleaning solutions, and prevent the re-adsorption of impurities. The bonding between the cleaning solution and metal powder is analyzed by referring to the Pourbaix diagram. The changes in the ionic conductivity, H2O2 decomposition behavior, and degree of dissolution are checked with a conductivity meter, and the changes in the absorbance and particle size before and after the reaction are confirmed by ultraviolet-visible spectroscopy (UV-vis) and dynamic light scattering (DLS) analyses. Thus, the addition of a chelating agent prevents the decomposition of H2O2 and improves the life of the silicon wafer cleaning solution, allowing it to react smoothly with metallic impurities.

• 반도체디스플레이기술학회지
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• 제22권2호
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• pp.17-23
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• 2023

In semiconductor manufacturing processes, a cleaning process is important that can remove sub-micron particles. Conventional wet cleaning methods using chemical have limits in removing nano-particles. Thus, physical forces of a mechanical vibration up to 1 MHz frequency, was tried to aid in detaching them from the substrates. In this article, we developed a 1 MHz quartz megasonic for a bare wafer cleaning using finite element analysis. At first, a 1 MHz megasonic prototype was manufactured. Using the results, a main product which can improve a particle removal performance, was analyzed and designed. The maximum impedance frequency was 992 kHz, which agreed well with the experimental value of 986 kHz (0.6% error). Acoustic pressure distributions were measured, and the result showed that maximum / average was 400.0~432.4%, and standard deviation / average was 46.4~47.3%. Finally, submicron particles were deposited and cleaned for the assessment of the system performance. As a result, the particle removal efficiency (PRE) was proved to be 92% with 11 W power. Reflecting these results, the developed product might be used in the semiconductor cleaning process.

• 한국전기전자재료학회논문지
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• 제15권6호
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• pp.479-485
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• 2002

We have investigated the effects of various wafers cleaning on glass/Si bonding using 4 inch Pyrex glass wafers and 4 inch silicon wafers. The various wafer cleaning methods were examined; SPM(sulfuric-peroxide mixture, $H_2SO_4:H_2O_2$ = 4 : 1, $120^{\circ}C$), RCA(company name, $NH_4OH:H_2O_2:H_2O$ = 1 : 1 : 5, $80^{\circ}C$), and combinations of those. The best room temperature bonding result was achieved when wafers were cleaned by SPM followed by RCA cleaning. The minimum increase in surface roughness measured by AFM(atomic force microscope) confirmed such results. During successive heat treatments, the bonding strength was improved with increased annealing temperatures up to $400^{\circ}C$, but debonding was observed at $450^{\circ}C$. The difference in thermal expansion coefficients between glass and Si wafer led debonding. When annealed at fixed temperatures(300 and $400^{\circ}C$), bonding strength was enhanced until 28 hours, but then decreased for further anneal. To find the cause of decrease in bonding strength in excessively long annealing time, the ion distribution at Si surface was investigated using SIMS(secondary ion mass spectrometry). tons such as sodium, which had been existed only in glass before annealing, were found at Si surface for long annealed samples. Decrease in bonding strength can be caused by the diffused sodium ions to pass the glass/si interface. Therefore, maximum bonding strength can be achieved when the cleaning procedure and the ion concentrations at interface are optimized in glass/Si wafer direct bonding.