• Journal of the Institute of Electronics Engineers of Korea SD
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• v.43 no.6 s.348
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• pp.9-17
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• 2006

We proposed a new High-speed CMOS Level Up/Down Shifter circuits that can be used with Dynamic Voltage and Frequency Scaling(DVFS) algorithm, for low power system in the SoC(System-on-Chip). This circuit used to interface between the other voltage levels in each CMOS circuit boundary, or between multiple core voltage levels in a system bus. Proposed circuit have advantage that decrease speed attenuation and duty ratio distortion problems for interface. The level up/down shifter of the proposed circuit designed that operated from multi core voltages$(0.6\sim1.6V)$ to used voltage level for each IP at the 500MHz input frequency The proposed circuit supports level up shifting from the input voltage levels, that are standard I/O voltages 1.8V, 2.5V, 3.3V, to multiple core voltage levels in between of $0.6V\sim1.6V$, that are used internally in the system. And level down shifter reverse operated at 1Ghz input frequency for same condition. Simulations results are shown to verify the proposed function by Hspice simulation, with $0.6V\sim1.6V$ CMOS Process, $0.13{\mu}m$ IBM CMOS Process and $0.65{\mu}m$ CMOS model parameters. Moreover, it is researched delay time, power dissipation and duty ration distortion of the output voltage witch is proportional to the operating frequency for the proposed circuit.

• Journal of Electrical Engineering and Technology
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• v.11 no.1
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• pp.125-134
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• 2016

We propose an efficient high voltage level shifter for a high side Buck converter driving a light-emitting diode (LED) lamp. The proposed circuit is comprised of a low voltage pulse width modulation (PWM) signal driver, a coupling capacitor, a resistor, and a diode. The proposed method uses a property of a PWM signal. The property is that the signal repeatedly transits between a low and high level at a certain frequency. A low voltage PWM signal is boosted to a high voltage PWM signal through a coupling capacitor using the property of the PWM signal, and the boosted high voltage PWM signal drives a p-channel metal oxide semiconductor (PMOS) transistor on the high side Buck converter. Experimental results show that the proposed level shifter boosts a low voltage (0 to 20 V) PWM signal at 125 kHz to a high voltage (370 to 380 V) PWM signal with a duty ratio of up to 0.9941.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.9
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• pp.49-57
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• 2009

In this paper, we propose a multiple voltage scheduling method which reduces energy consumption considering both timing constraints and resource constraints. In the other multiple voltage scheduling techniques, high voltage is assigned to operations in the longest path and low voltage is assigned to operations that are not on the longest path. However, in those methods, voltages are assigned to specific operations restrictively. We use a simulated annealing technique, in which several voltages are assigned to specific operations flexibly regardless of whether they are on the longest path. In this paper, a post processing algorithm is proposed to further reduce the energy consumption. In some cases, designers may want to reduce the level shifters. To make tradeoff between the total energy and the number (or energy) of level shifters weighted term can be added to the cost function. When the level shifter energy is weighted six times, for example, the number of level shifters is reduced by about 24% and their energy consumption is reduced by about 20%.

• 한국정보디스플레이학회:학술대회논문집
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• 2004.08a
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• pp.1015-1018
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• 2004

We proposed a new cross-coupled level shifter circuit using low temperature poly-Si(LTPS) TFT. The proposed level shifter can operate on low input voltage in spite of low mobility and widely varying high threshold voltage of LTPS TFT. Also, the proposed level shifter operates at high frequency and reduces power consumption for having fast rising and falling time and shortening period flowing short-circuit currents.

• Proceedings of the IEEK Conference
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• 2005.11a
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• pp.747-750
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• 2005

In this paper, we propose a new level shifter circuit for reducing power consumption. The concept of the proposed level shifter is to use capacitive coupling effect to reduce short circuit current. The power consumption of the proposed level shifter is reduced up to 50%, compared to the conventional level shifter. Especially the proposed level shifter circuit works well with low temperature poly-Si (LTPS) TFTs. It can operate on low input voltage even with low-mobility, high and widely-varying threshold voltage of LTPS TFT.

• Proceedings of the IEEK Conference
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• 2006.06a
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• pp.657-658
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• 2006

A Novel level-shifter circuit for Display Panel Driver is presented. A Proposed level-shifter is for the high speed and high-voltage driving capability. In order to achieve this purpose, the proposed level-shifter restricts and separates the Vgs of the output driver's pull-up PMOS and pull-down NMOS with Zener diode. And a speed-up PMOS transistor is introduced to reduce delay. The control signal of speed-up PMOS was designed by bootstrapping method to minimize the gate to source (Vgs) voltage to avoid Vgs breakdown.

• Proceedings of the IEEK Conference
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• 2008.06a
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• pp.525-526
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• 2008

This paper proposes a new high-speed level shifter using a special high voltage device with low threshold voltage. Also, novel low voltage swing method is proposed. The high voltage device is a standard LDMOS(Laterally Diffused MOS) device in a $0.18{\mu}m$ CMOS process without adding extra mask or process step to realize it. A level shifter uses 5V LDMOSs as voltage clamps to protect 1.8V NMOS switches from high voltage stress the gate oxide. Also, level-up transition from 1.8V to 5V takes only 1.5ns in time. These circuits do not consume static DC power, therefore they are very suitable for low-power and high-speed interfaces in the deep sub-quarter-micron CMOS technologies.

• The Journal of the Korea institute of electronic communication sciences
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• v.11 no.5
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• pp.479-484
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• 2016

In this paper, a design of DC level shifter transmitting and receiving control and data signal which have various DC level through daisy chain interface between master IC and slave is introduced in the cell voltage monitoring (CVM). Circuit designed with a latch structure have a function to operate in high speed and for output of variable DC level through transmission gate. As a result of the simulation and the measurement, it was confirmed that control and data signal could be transferred according to the change of DC level from 0V to 30V. Delay time was measured about 170ns. but, it was considered as a negligible tolerance due to a parasitic capacitance of measuring probe and test board.

• Journal of Electrical Engineering and Technology
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• v.9 no.4
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• pp.1137-1144
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• 2014

A parallel-feeding AC traction power system increases the power supply capacity and decreases voltage fluctuations, but the circulating power flow caused by the phase difference between the traction substations prevents the system from being widely used. A circuit analysis shows that the circulating power flow increases almost linearly as the phase difference increases, which adds extra load to the system and results in increased power dissipation and load unbalance. In this paper, we suggest a phase shifter for the parallel-feeding AC traction power system. The phase shifter regulates the phase difference and the circulating power flow by injecting quadrature voltage which can be obtained directly from the Scott-connection transformer in the traction substation. A case study involving the phase shifter applied to the traction power system of a Korean high-speed rail system shows that a three-level phase shifter can prevent circulating power flow while the phase difference between substations increases up to 12 degrees, mitigate the load unbalance, and reduce power dissipation.

• Nuclear Engineering and Technology
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• v.33 no.2
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• pp.201-208
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• 2001

The high power RF transmission line components are required for transmitting MW level RF power continuously in RF heating and current drive system which heat the plasma and produce plasma current in fusion reactor The liquid stub and phase shifter is proposed as the superior to the conventional stub and phase shifter. Experimental results show that they are reliable and easy to operate compared to the conventional stub and phase shifter. There is no distortion of reflected power during the raising of the liquid level. RF breakdown voltage is over 40kV. Temperature increment of the liquid is expected not to be severe. These results verify that the liquid stub and phase shifter can be used reliably in the high power continuous RF facilities.