• Title/Summary/Keyword: VCO(Voltage control oscillator)

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An InGaP/GaAs HBT Based Differential Colpitts VCO with Low Phase Noise

  • Shrestha, Bhanu;Kim, Nam-Young
    • Journal of electromagnetic engineering and science
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    • v.7 no.2
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    • pp.64-68
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    • 2007
  • An InGaP/GaAs HBT based differential Colpitts voltage control oscillator(VCO) is presented in this paper. In the VCO core, two switching transistors are introduced to steer the core bias current to save power. An LC tank with an inductor quality factor(Q) of 11.4 is used to generate oscillation frequency. It has a superior phase noise characteristics of -130.12 dBc/Hz and -105.3 at 1 MHz and 100 kHz frequency offsets respectively from the carrier frequency(1.566 GHz) when supplied with a control voltage of 0 volt. It dissipates output power of -5.3 dBm. Two pairs of on-chip base collector (BC) diodes are used in the tank circuit to increase the VCO tuning range(168 MHz). This VCO occupies the area of $1.070{\times}0.90mm^2$ including buffer and pads.

10 GHz LC Voltage-controlled Oscillator with Amplitude Control Circuit for Output Signal (출력 신호의 진폭 제어 회로를 가진 10 GHz LC 전압 제어 발진기)

  • Song, Changmin;Jang, Young-Chan
    • Journal of IKEEE
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    • v.24 no.4
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    • pp.975-981
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    • 2020
  • A 10 GHz LC voltage-controlled oscillator (VCO), which controls an amplitude of output signal, is proposed to improve the phase noise. The proposed amplitude control circuit for the LC VCO consists of a peak detector, an amplifier, and a current source. The peak detector is performed detecting the lowest voltage of the output signal by using two diode-connected NMOSFET and a capacitor. The proposed 10 GHz LC VCO with an amplitude control circuit for output signal is designed using a 55 nm CMOS process with a supply voltage of 1.2 V. Its area is 0.0785 ㎟. The amplitude control circuit used in the proposed LC VCO reduces the amplitude variation 242 mV generated in the output signal of the conventional LC VCO to 47 mV. Furthermore, it improves the peak-to-peak time jitter from 8.71 ps to 931 fs.

Design of VCO(Voltage Controlled Oscillator) for mobile communication with a built-in voltage regulator (전압 레귤레이터를 내장한 이동통신용 VCO(Voltage Controlled Oscillator) 설계)

  • Cho, Hyon-mook
    • The Journal of the Acoustical Society of Korea
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    • v.16 no.4
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    • pp.76-84
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    • 1997
  • In this paper, one of the core components of a mobile communication system, VCO(Voltage Controlled Oscillator) IC is designed. The VCO IC was designed, have realized as LC turned oscillator using varicap. LC sinusoidal tuned oscillator generally requires external inductors and thus remainding circuit is implemneted in monolithic IC. The circuit is fabricated using an 15 mask IC process and has a die size of 1150um${\times}$780um. The tests showed that VCO was operated at frequencies in the regions between 880MHz-915MHz in the control voltage range of 1V to 3V at 5V supply voltage and as the power supply was varied from 4.5V to 5.5V, the frequency varied 425KHz/V. The VCO IC has frequency shift of 1.97MHz/T, carrier level of -7dBm and power consumption of 16.7mA. Also it has phase noise of -80dBc/Hz, offset at 50KHz and harmonic response of center frequency is -41dBm. For the future development of the transceiver 1 chip, the previously mentioned external devices need to be incorporated into Si MMIC.

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A study on the improvement in Q-factor chracteristics of VCO resonance part (VCO 공진부의 Q-factor 특성향상에 관한 연구)

  • Lee, Hyun-Jong;Kim, In-Sung;Min, Bok-Gi;Song, Jae-Sung
    • Proceedings of the KIEE Conference
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    • 2005.07b
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    • pp.1506-1508
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    • 2005
  • VCO(voltage controlled oscillator) using mobile communication device decides direct characteristics as parts that affect important in stable oscillation and distortion characteristics of system. VCO used 900 MHz band was designed by the transformation of Colpitts circuit form use ADS that consider Q-factor to minimize phase noise. VCO manufactured together evaluation board and voltage control oscillator to FR-4 PCB. VCO experimented chracteristics after control through resonance department tuning. In our research, the designed VCO has 15.5 dBm output level at the bias condition of 6V and 10mA and the operating frequency range of 917 MHz$\sim$937 MHz band. Phase noise is -98.28 dBc/Hz at 1 MHz frequency offset from the carrier.

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10-GHz Band Voltage Controlled Oscillator (VCO) MMIC for Motion Detecting Sensors

  • Kim, Sung-Chan;Kim, Yong-Hwan;Ryu, Keun-Kwan
    • Journal of information and communication convergence engineering
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    • v.16 no.1
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    • pp.12-16
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    • 2018
  • In this work, a voltage controlled oscillator (VCO) monolithic microwave integrated circuit (MMIC) was demonstrated for 10-GHz band motion detecting sensors. The VCO MMIC was fabricated using a $2-{\mu}m$ InGap/GaAs HBT process, and the tuning of the oscillation frequency is achieved by changing the internal capacitance in the HBT, instead of using extra varactor diodes. The implemented VCO MMIC has a micro size of $500{\mu}m{\times}500{\mu}m$, and demonstrates the value of inserting the VCO into a single chip transceiver. The experimental results showed that the frequency tuning characteristic was above 30 MHz, with the excellent output flatness characteristic of ${\pm}0.2dBm$ over the tuning bandwidth. And, the VCO MMIC exhibited a phase noise characteristic of -92.64 dBc/Hz and -118.28 dBc/Hz at the 100 kHz and 1 MHz offset frequencies from the carrier, respectively. The measured values were consistent with the design values, and exhibited good performance.

Power Consumption Change in Transistor Ratio of Ring Voltage Controlled Oscillator (링 전압 제어 발진기의 트랜지스터 비율에 따른 소모 전력 변화)

  • Moon, Dongwoo;Shin, Hooyoung;Lee, Milim;Kang, Inseong;Lee, Changhyun;Park, Changkun
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.27 no.2
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    • pp.212-215
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    • 2016
  • In this paper, a 5.08 GHz Ring Voltage Controlled Oscillator(Ring VCO) was implemented using $0.18{\mu}m$ standard CMOS technology. The proposal Ring VCO is 3-stage structure. This research confirmed that the each stage's different transistor size ratio influence the current change and alter power consumption consequentially. This circuit is formed to control the current thereby adding the Current Mirror and to tune the frequency by supplying control voltage. It has an 65.5 %(1.88~5.45 GHz) tuning range. The measured output power is -0.30 dBm. The phase noise is -87.50 dBc/Hz @1 MHz offset with operating frequency of 5.08 GHz fundamental frequency. The total power consumption of Ring VCO is 31.2 mW with 2.4 V supply voltage.

Design of a High Speed CMOS PLL with a Two-stage Self-feedback Ring Oscillator (자체귀환형 2단 고리발진기를 이용한 고속 CMOS PLL 설계)

  • 문연국;윤광섭
    • Proceedings of the IEEK Conference
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    • 1999.06a
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    • pp.353-356
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    • 1999
  • A 3.3V PLL(Phase Locked loop) is designed for a high frequency, low voltage, and low power applications. This paper proposes a new PLL architecture to improve voltage to frequency linearity of VCO(Voltage controlled oscillator) with new delay cell. The proposed VCO operates at a wide frequency range of 30MHz~1㎓ with a good linearity. The DC-DC voltage up/down converter is utilized to regulate the control voltage of the two-stage VCO. The designed PLL architecture is implemented on a 0.6${\mu}{\textrm}{m}$ n-well CMOS process. The simulation results show a locking time of 2.6$\mu$sec at 1Hz, Lock in range of 100MHz~1㎓, and a power dissipation of 112㎽.

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A Low-Spur CMOS PLL Using Differential Compensation Scheme

  • Yun, Seok-Ju;Kim, Kwi-Dong;Kwon, Jong-Kee
    • ETRI Journal
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    • v.34 no.4
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    • pp.518-526
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    • 2012
  • This paper proposes LC voltage-controlled oscillator (VCO) phase-locked loop (PLL) and ring-VCO PLL topologies with low-phase noise. Differential control loops are used for the PLL locking through a symmetrical transformer-resonator or bilaterally controlled varactor pair. A differential compensation mechanism suppresses out-band spurious tones. The prototypes of the proposed PLL are implemented in a CMOS 65-nm or 45-nm process. The measured results of the LC-VCO PLL show operation frequencies of 3.5 GHz to 5.6 GHz, a phase noise of -118 dBc/Hz at a 1 MHz offset, and a spur rejection of 66 dBc, while dissipating 3.2 mA at a 1 V supply. The ring-VCO PLL shows a phase noise of -95 dBc/Hz at a 1 MHz offset, operation frequencies of 1.2 GHz to 2.04 GHz, and a spur rejection of 59 dBc, while dissipating 5.4 mA at a 1.1 V supply.

A Design of Voltage Controlled Oscillator and High Speed 1/4 Frequency Divider using 65nm CMOS Process (65nm CMOS 공정을 이용한 전압제어발진기와 고속 4분주기의 설계)

  • Lee, Jongsuk;Moon, Yong
    • Journal of the Institute of Electronics and Information Engineers
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    • v.51 no.11
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    • pp.107-113
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    • 2014
  • A VCO (Voltage Controlled Oscillator) and a divide-by-4 high speed frequency divider are implemented using 65nm CMOS technology for 60GHz wireless communication system. The mm-wave VCO was designed by NMOS cross-coupled LC type using current source. The architecture of the divide-by-4 high speed frequency divider is differential ILFD (Injection Locking Frequency Divider) with varactor to control frequency range. The frequency divider also uses current sources to get good phase noise characteristics. The measured results show that the VCO has 64.36~67.68GHz tuning range and the frequency divider divides the VCO output by 4 exactly. The high output power of 5.47~5.97dBm from the frequency divider is measured. The phase noise of the VCO including the frequency divider are -77.17dBc/Hz at 1MHz and -110.83dBc/Hz at 10MHz offset frequency. The power consumption including VCO is 38.4mW with 1.2V supply voltage.