• Journal of the Korean institute of surface engineering
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• v.36 no.2
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• pp.214-225
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• 2003

Trends in microelectronics packages such as low cost, miniaturization, high performance, and high reliability made area array interconnecting technologies including flip chip, CSP (Chip Scale Package) and BGA (Ball Grid Array) mainstream technologies. Underfill technology is used for the reliability of the area array technologies, thus electronics packaging industry regards it as very important technology In this paper, the underfill technology is reviewed and the recent advances in the underfill technology including new processes and materials are introduced. These includes reworkable underfills, no-flow underfills, molded underfills and wafer - level - applied underfills.

• ETRI Journal
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• v.38 no.6
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• pp.1179-1189
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• 2016

A chemorheological analysis of a no-flow underfill was conducted using curing kinetics through isothermal and dynamic differential scanning calorimetry, viscosity measurement, and solder (Sn/27In/54Bi, melting temperature of $86^{\circ}C$) wetting observations. The analysis used an epoxy system with an anhydride curing agent and carboxyl fluxing capability to remove oxide on the surface of a metal filler. A curing kinetic of the no-flow underfill with a processing temperature of $130^{\circ}C$ was successfully completed using phenomenological models such as autocatalytic and nth-order models. Temperature-dependent kinetic parameters were identified within a temperature range of $125^{\circ}C$ to $135^{\circ}C$. The phenomenon of solder wetting was visually observed using an optical microscope, and the conversion and viscosity at the moment of solder wetting were quantitatively investigated. It is expected that the curing kinetics and rheological property of a no-flow underfill can be adopted in arbitrary processing applications.

• ETRI Journal
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• v.34 no.5
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• pp.706-712
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• 2012

In previous work, novel maskless bumping and no-flow underfill technologies for three-dimensional (3D) integrated circuit (IC) integration were developed. The bumping material, solder bump maker (SBM) composed of resin and solder powder, is designed to form low-volume solder bumps on a through silicon via (TSV) chip for the 3D IC integration through the conventional reflow process. To obtain the optimized volume of solder bumps using the SBM, the effect of the volumetric mixing ratio of resin and solder powder is studied in this paper. A no-flow underfill material named "fluxing underfill" is proposed for a simplified stacking process for the 3D IC integration. It can remove the oxide layer on solder bumps like flux and play a role of an underfill after the stacking process. The bumping process and the stacking process using the SBM and the fluxing underfill, respectively, for the TSV chips are carefully designed so that two-tier stacked TSV chips are sucessfully stacked.

• Journal of Welding and Joining
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• v.25 no.3
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• pp.45-50
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• 2007

The present study is devoted to investigate the transient flow and to estimate the filling time fur underfill process by using the numerical model established on the fluid momentum equation. For optimization of the design and selection of process parameters, this study extensively presents an estimation of the filling time in the view points of some important factors related to underfill materials and flip-chip geometry. From the results, we conclude that the filling time changes with respect to the under fill materials because of different viscosity, surface tension coefficient and contact angle. It reveals that, as the gap height increases, the filling time decreases substantially, and goes to the saturated values.

• Journal of the Microelectronics and Packaging Society
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• v.16 no.3
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• pp.39-43
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• 2009

In this paper, the flow characteristics of underfill material driven by capillary action between flip-chip and substrate were investigated. Also, the effects of viscosity level and dispensing point of underfill on flow characteristics were investigated. Flip chip package size was $5mm{\times}5mm{\times}0.65^tmm$, the diameter of solder bump was 100 ${\mu}m$, and the pitch was 150 ${\mu}m$. It was full grid area-array type with 1024 I/Os. The glass substrate was used and the gap between the chip and substrate was 50 ${\mu}m$. For the experimental study, three different underfills with different viscous properties($2000{\sim}3700$ cps), and two different types of dispensing methods(center dot and edge dot) were used. The flow characteristics and filling time of underfill were investigated by using CCD camera. The results show that the edge flow was faster than center flow due to the edge effect, which was caused by the resistance of solder bumps. In case of edge dot dispensing type, the filling time was faster due to the large edge effect, compared to center dot dispensing type. Also, it was found that the underfill flow was faster and the filling time decreased as the viscosity level of underfill was decreased.

• Journal of the Microelectronics and Packaging Society
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• v.7 no.2
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• pp.21-27
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• 2000

To develop the underfill materials which are required for the new process of semi-conductor industry, the properties of epoxy/anhydride/cobalt(II) catalyst system with two types of fused silica(1 $\mu\textrm{m}$, 8 $\mu\textrm{m}$) are studied as a function of filler fraction. According to the curing profile, the optimum catalyst amount was 1.0 wt% for full curing at the conditions of $160^{\circ}C$/l5 min., and we could conclude that the viscosity has superior effect on the real flaw through the relationship between surface tension and viscosity data. The underfills which were filled with 1 $\mu\textrm{m}$ fused silica did not show good flowability, but they should be useful by improving the viscosity for a future process which has small gaps. The underfills which were filled with 8 $\mu\textrm{m}$ fused silica showed good flowability when the filler contents were 55~60 vol%. The model which was referred by Matthew can predict the real flow length only when the underfill has high viscosity and low surface tension.

• Journal of Advanced Marine Engineering and Technology
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• v.37 no.4
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• pp.351-357
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• 2013

In flip chip packaging, underfill process is used to fill epoxy bonder into the gap between a chip and a substrate in order to improve the reliability of electronic devices. Underfill process by capillary motion can give rise to unwanted air void formations since the arrangement of solder bumps affects the interfacial dynamics of flow meniscus. In this paper, the unsteady flows in the capillary underfill process are visualized and then the racing effect and merging of the meniscus are investigated according to the arrangement of solder bumps. The result is shown that at higher bump density, the fluid flow perpendicular to the main direction of flow becomes stronger so that more air voids are formed. This phenomenon is more conspicuous at a staggered bump array than at a rectangular bump array.

• Proceedings of the International Microelectronics And Packaging Society Conference
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• 2001.11a
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• pp.134-137
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• 2001

The cure kinetics of a cycloalipatic epoxy / anhydride / Co(II) system for a no-flow underfill encapsulant, has been studied by using a differential scanning calorimetry(DSC) under isothermal and dynamic conditions over the temperature range of $160^{\circ}C ~220^{\circ}C$. The kinetic analysis was carried out by fitting dynamic/isothermal heating experimental data to the kinetic expressions to determine the reaction parameters, such as order of reaction and reaction constants. Diffusion-controlled reaction has been observed as the cure conversion increases and successfully analyzed by incorporating the diffusion control term into the rate equation. The prediction of reaction rates by the model equation corresponded well to experimental data at all temperature.

• Journal of the Korean Society for Precision Engineering
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• v.22 no.8 s.173
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• pp.100-107
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• 2005

The objective of the study is to improve the quality of wheel bearing hub by the rigid-plastic finite element analysis and the response surface methodology. The rigid-plastic finite element codes, AFDEX-2D and DEFORM-3D, were used to analyze the two-dimensional and three-dimensional forging processes, respectively. The response surface analysis is used to find the minimum underfill by the variation of design variables such as the height of billet after upsetting and punch angles of blocker dies. The metal flow of forged product shows good agreement with the results from 2D and 3D analysis. Also, the quality of the wheel bearing hub has been improved by the optimization of design variables and the machining time has been reduced by the machining allowance.

• ETRI Journal
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• v.35 no.6
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• pp.1152-1155
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• 2013

A cost-effective and simple solder on pad (SoP) process is proposed for a fine-pitch microbump interconnection. A novel solder bump maker (SBM) material is applied to form a 60-${\mu}m$ pitch SoP. SBM, which is composed of ternary Sn3.0Ag0.5Cu (SAC305) solder powder and a polymer resin, is a paste material used to perform a fine-pitch SoP through a screen printing method. By optimizing the volumetric ratio of the resin, deoxidizing agent, and SAC305 solder powder, the oxide layers on the solder powder and Cu pads are successfully removed during the bumping process without additional treatment or equipment. Test vehicles with a daisy chain pattern are fabricated to develop the fine-pitch SoP process and evaluate the fine-pitch interconnection. The fabricated Si chip has 6,724 bumps with a 45-${\mu}m$ diameter and 60-${\mu}m$ pitch. The chip is flip chip bonded with a Si substrate using an underfill material with fluxing features. Using the fluxing underfill material is advantageous since it eliminates the flux cleaning process and capillary flow process of the underfill. The optimized bonding process is validated through an electrical characterization of the daisy chain pattern. This work is the first report on a successful operation of a fine-pitch SoP and microbump interconnection using a screen printing process.