• Journal of Power Electronics
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• 제16권4호
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• pp.1504-1512
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• 2016

This paper presents a new single-phase asymmetrical cascaded multilevel DC-link inverter. The proposed inverter comprises two stages. The main stage of the inverter consists of multiple similar cells, each of which is a half-bridge inverter consisting of two switches and a single DC source. All cells are connected in a cascaded manner with a fixed neutral point. The DC source values are not made equal to increase the performance of the inverter. The second circuit is a folded cascaded H-bridge circuit operating at a line frequency. One of the main advantages of this proposed topology is that it is a modular type and can thus be extended to high stages without changing the configuration of the main stage circuit. Two control schemes, namely, low switching with selective harmonic elimination and sinusoidal pulse width modulation, are employed to validate the proposed topology. The detailed approach of each control scheme and switching pulses are discussed in detail. A 150W prototype of the proposed system is implemented in the laboratory to verify the validity of the proposed topology.

• 센서학회지
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• 제18권4호
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• pp.280-285
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• 2009

In this paper, we designed a 2-stage CMOS operational amplifier with temperature compensation function using 2-poly 4-metal 0.35 $\mu$m standard CMOS technology. Using two bias circuits, the positive temperature coefficient(PTC) and the negative temperature coefficient(NTC) of the bias circuit are canceled out each other. When reference current circuit is simulated that it has a temperature coefficient of -150 ppm/$^{\circ}C$ with a temperature change from 0 $^{\circ}C$ to 120 $^{\circ}C$. Also the proposed circuit has a temperature coefficient of -0.011 dB/$^{\circ}C$ of DC open loop gain with the same temperature range.

• Journal of Power Electronics
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• 제19권5호
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• pp.1099-1107
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• 2019

A soft switching converter with wide voltage range operation is investigated in this paper. A series resonant converter is implemented to achieve a high circuit efficiency with soft switching characteristics on power switches and rectifier diodes. To improve the weakness of the narrow voltage range in LLC converters, an alternating current (ac) power switch is used on the primary side to select a half-bridge or full-bridge resonant circuit to implement 4:1 voltage range operation. On the secondary-side, another ac power switch is adopted to select a full-wave rectifier or voltage-doubler rectifier to achiever an additional 2:1 output voltage range. Therefore, the proposed resonant converter has the capacity for 8:1 (320V~40V) wide output voltage operation. A single-stage hybrid resonant converter is employed in the study circuit instead of a two-stage dc converter to achiever wide voltage range operation. As a result, the study converter has better converter efficiency. The theoretical analysis and circuit characteristics are verified by experiments with a prototype circuit.

• 제어로봇시스템학회논문지
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• 제12권3호
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• pp.241-247
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• 2006

We propose a character recognition system to extract the component reference names from printed circuit boards (PCBs) automatically. The names are written in horizontal, vertical, reverse-horizontal and reverse-vertical directions. Also various symbols and figures are included in PCBs. To recognize the character and orientation effectively, we divide the recognizer into two stages: character classification stage and orientation classification stage. The character classification stage consists of two sub-recognizers and a verifier. The rotaion-invarint features of input pattern are then used to identify the character independent of orientation. Each recognizer is implemented as a neural network, and the weight values of verifier are obtained by genetic algorithm. In the orientation classification stage, the input pattern is compared with reference patterns to identify the orientation. Experimental results are presented to verify the usefulness of the proposed system.

• Progress in Superconductivity
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• 제1권2호
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• pp.105-109
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• 2000

We have designed and fabricated a single-flux-quantum(SFQ) four-stage shift register using YBCO bicrystal Josephson junctions, and tested its operations using a digital measurement set-up. The circuit consists of 4 shift register stages and a read SQUID placed next to each side of the shift register. Each SQUID was inductively coupled to the nearby shift register stage. The major obstacle in testing the circuits was the interference between the two read SQUIDs, and we could get over the problem by determining the correct operation points of the SQUID from the simultaneously measured modulation curves. Loaded data ('1' or '0') were successfully shifted from a stage to the next by a controlled current pulse injected to the bias lines located between the stages, and the corresponding correct data shifts were observed with the two read SQUIDs.

• 한국정보통신학회:학술대회논문집
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• 한국해양정보통신학회 2002년도 춘계종합학술대회
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• pp.283-287
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• 2002

To remedy both the degradation and saturation of the output voltages in the modified Dickson pump. a new multi-stage charge pump circuit is presented in this paper. Here using PMOS charge-transfer switches instead of NMOS ones eliminates the necessity of diode-configured output stage in the modified-Dickson pump, achieving the improved voltage pumping gain and its output voltages proportional to the stage numbers. Measurement indicates that VOUT/3VDD of this new pump circuit with two stages reaches to a value as high as 0.94 even with low VDD=1.0 V, strongly addressing that this scheme is very favorable at low-voltage memory applications.

• International Journal of Internet, Broadcasting and Communication
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• 제16권2호
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• pp.103-111
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• 2024

We address the problematic issue of blinking in residential LED lighting systems-a phenomenon that has recently become a significant concern due to voltage sags caused by high-power household appliances. To combat this, we developed a two-stage LED converter with integrated anti-blinking circuitry, specifically designed for T5 LED indirect lighting fixtures. The first stage employs a Power Factor Correction (PFC) boost circuit to enhance voltage stability by aligning the voltage and current phases, thereby minimizing power losses. The second stage, a meticulously engineered DC-DC buck converter, ensures stable lighting despite electrical fluctuations. Rigorous testing has confirmed our converter's efficacy in maintaining consistent light output without blinking, thereby substantially improving user comfort and adhering to strict standards for harmonic distortion and electromagnetic compatibility. Our breakthrough provides a robust solution to a pressing issue, marking a significant advancement in LED lighting technology.

• JSTS:Journal of Semiconductor Technology and Science
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• 제14권6호
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• pp.768-776
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• 2014

Using a simplified high-frequency small-signal equivalent circuit model for BSIM3 MOSFET, the fully differential two-stage folded-cascode CMOS operational amplifier is analyzed to obtain its small-signal voltage transfer function. As a result, the expressions for dc gain, five zero frequencies, five pole frequencies, unity-gain frequency, and phase margin are derived for op amp design using design equations. Then the analysis result is verified through the comparison with Spice simulations of both a high speed op amp and a low power op amp designed for the $0.13{\mu}m$ CMOS process.

• JSTS:Journal of Semiconductor Technology and Science
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• 제16권5호
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• pp.605-614
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• 2016

We develop a novel SAD circuit for power-efficient H.264 encoding, namely a-SAD. Here, some highest-order MSB's are approximated to single MSB. Our theoretical estimations show that our proposed design simultaneously improves performance and power of SAD circuit, achieving good power efficiency. We decide that the optimal number of approximated MSB's is four under 8-bit YUV-420 format, the largest number not to affect video quality and compression-rate in our video experiments. In logic simulations, our a-SAD circuit shows at least 9.3% smaller critical-path delay compared to existing SAD circuits. We compare power dissipation under iso-throughput scenario, where our a-SAD circuit obtains at least 11.6% power saving compared to other designs. We perform same simulations under two- and three-stage pipelined architecture. Here, our a-SAD circuit delivers significant performance (by 13%) and power (by 17% and 15.8% for two and three stages respectively) improvements.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2003년도 추계학술대회 논문집 전기기기 및 에너지변환시스템부문
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• pp.187-189
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• 2003

Conventional Switched Mode Power Supplies(SMPS) with diode-capacitor rectifier have distorted input current waveform with high harmonic content. Typically, these SMPS have a power factor lower than 0,65. To improve with this problem the power factor correction(PFC) circuit of power supplies has to be introduced. Specially. to the reduce size and manufacture cost of power conversion device, the single-stage PFC converter is increased to demand as necessary of study. in this paper, The comparative analysis of power factor correction circuit using Feedforward control with average current mode flyback converter(single-stage) and boost converter(two-stage). Also, the validity of designed and manufactured high power factor flyback converter and boost converter is confirmed by simulation and experimental results.