• Title/Summary/Keyword: Through-Silicon-Via

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A Study on New Twist-Diamond Wire Characteristics for Improving Processing Performance (트위스트 다이아몬드 와이어의 성능향상을 위한 특성평가에 관한 연구)

  • Park, Chang-Yong;Kweon, Hyun-Kyu;Peng, Bo;Jung, Bong-Gyo
    • Journal of the Korean Society of Manufacturing Process Engineers
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    • v.15 no.1
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    • pp.26-33
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    • 2016
  • In this study, a new method to develop a fixed diamond wire for silicon wafer machining by the multi-wire cutting method was developed. The new twist diamond wire has improved performance with high breaking strength and chip flutes structure. According to these characteristics, the new twist diamond wire can be used in the higher speed multi-wire cutting process with a long lifetime. Except the design of the new structure, the twist diamond wire is coating by electroless-electroplating process. It is good for reducing breakage and the falling-off of diamond grains. Based on the silicon material removal mechanism and performance of the wire-cutting machine, the optimal processing condition of the new twist diamond wire has been derived via mathematical analysis. At last, through the tensile testing and the machining experiments, the performance of the twist diamond wire has been obtained to achieve the development goals and exceed the single diamond wire.

Thermo-mechanical Reliability Analysis of Copper TSV (구리 TSV의 열기계적 신뢰성해석)

  • Choa, Sung-Hoon;Song, Cha-Gyu
    • Journal of Welding and Joining
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    • v.29 no.1
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    • pp.46-51
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    • 2011
  • TSV technology raises several reliability concerns particularly caused by thermally induced stress. In traditional package, the thermo-mechanical failure mostly occurs as a result of the damage in the solder joint. In TSV technology, however, the driving failure may be TSV interconnects. In this study, the thermomechanical reliability of TSV technology is investigated using finite element method. Thermal stress and thermal fatigue phenomenon caused by repetitive temperature cycling are analyzed, and possible failure locations are discussed. In particular, the effects of via size, via pitch and bonding pad on thermo-mechanical reliability are investigated. The plastic strain generally increases with via size increases. Therefore, expected thermal fatigue life also increase as the via size decreases. However, the small via shows the higher von Mises stress. This means that smaller vias are not always safe despite their longer life expectancy. Therefore careful design consideration of via size and pitch is required for reliability improvement. Also the bonding pad design is important for enhancing the reliability of TSV structure.

Picoseconds Laser Drilling and Platform (피코초 레이저 드릴링 공정 및 플랫폼)

  • Suh, Jeong;Shin, Dong-Sig;Sohn, Hyon-Kee;Song, Jun-Yeob
    • Journal of the Korean Society for Precision Engineering
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    • v.27 no.10
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    • pp.40-44
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    • 2010
  • Laser drilling is an enabling technology for Through Silicon Via (TSV) interconnect applications. Recent advances in picoseconds laser drilling of blind, micron sized vias in silicon is presented here highlighting some of the attractive features of this approach such as excellent sidewall quality. In this study, we dealt with comparison of heat affection around drilled hole between a picosecond laser and a nanosecond laser process under the UV wavelength. Points which special attention should be paid are that picosecond laser process lowered experimentally recast layer, surface debris and micro-crack around hole in comparison with nanosecond laser process. These finding suggests that laser TSV process has possibility to drill under $10{\mu}m$ via. Finally, the laser drilling platform was constructed successfully.

High-Speed Cu Filling into TSV and Non-PR Bumping for 3D Chip Packaging (3차원 실장용 TSV 고속 Cu 충전 및 Non-PR 범핑)

  • Hong, Sung-Chul;Kim, Won-Joong;Jung, Jae-Pil
    • Journal of the Microelectronics and Packaging Society
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    • v.18 no.4
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    • pp.49-53
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    • 2011
  • High-speed Cu filling into a through-silicon-via (TSV) and simplification of bumping process by electroplating for three dimensional stacking of Si dice were investigated. The TSV was prepared on a Si wafer by deep reactive ion etching, and $SiO_2$, Ti and Au layers were coated as functional layers on the via wall. In order to increase the filling rate of Cu into the via, a periodic-pulse-reverse wave current was applied to the Si chip during electroplating. In the bumping process, Sn-3.5Ag bumping was performed on the Cu plugs without lithography process. After electroplating, the cross sections of the vias and appearance of the bumps were observed by using a field emission scanning electron microscope. As a result, voids in the Cu-plugs were produced by via blocking around via opening and at the middle of the via when the vias were plated for 60 min at -9.66 $mA/cm^2$ and -7.71 $mA/cm^2$, respectively. The Cu plug with a void or a defect led to the production of imperfect Sn-Ag bump which was formed on the Cu-plug.

A Performance Analysis for Interconnections of 3D ICs with Frequency-Dependent TSV Model in S-parameter

  • Han, Ki Jin;Lim, Younghyun;Kim, Youngmin
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.14 no.5
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    • pp.649-657
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    • 2014
  • In this study, the effects of the frequency-dependent characteristics of through-silicon vias (TSVs) on the performance of 3D ICs are examined by evaluating a typical interconnection structure, which is composed of 32-nm CMOS inverter drivers and receivers connected through TSVs. The frequency-domain model of TSVs is extracted in S-parameter from a 3D electromagnetic (EM) method, where the dimensional variation effect of TSVs can be accurately considered for a comprehensive parameter sweep simulation. A parametric analysis shows that the propagation delay increases with the diameter and height of the TSVs but decreases with the pitch and liner thickness. We also investigate the crosstalk effect between TSVs by testing different signaling conditions. From the simulations, the worst signal integrity is observed when the signal experiences a simultaneously coupled transition in the opposite direction from the aggressor lines. Simulation results for nine-TSV bundles having regular and staggered patterns reveal that the proposed method can characterize TSV-based 3D interconnections of any dimensions and patterns.

Fabrication of Test Socket from BeCu Metal Sheet (BeCu 금속박판을 이용한 테스트 소켓 제작)

  • Kim, Bong-Hwan
    • Journal of Sensor Science and Technology
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    • v.21 no.1
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    • pp.34-38
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    • 2012
  • We have developed a cost effective test socket for ball grid array(BGA) integrated circuit(IC) packages using BeCu metal sheet as a test probe. The BeCu furnishes the best combination of electrical conductivity and corrosion resistance. The probe of the test socket was designed with a BeCu cantilever. The cantilever was designed with a length of 450 ${\mu}m$, a width of 200 ${\mu}m$, a thickness of 10 ${\mu}m$, and a pitch of 650 ${\mu}m$ for $11{\times}11$ BGA. The fabrication of the test socket used techniques such as through-silicon-via filling, bonding silicon wafer and BeCu metal sheet with dry film resist(DFR). The test socket is applicable for BGA IC chip.

Alumina Templates on Silicon Wafers with Hexagonally or Tetragonally Ordered Nanopore Arrays via Soft Lithography

  • Park, Man-Shik;Yu, Gui-Duk;Shin, Kyu-Soon
    • Bulletin of the Korean Chemical Society
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    • v.33 no.1
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    • pp.83-89
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    • 2012
  • Due to the potential importance and usefulness, usage of highly ordered nanoporous anodized aluminum oxide can be broadened in industry, when highly ordered anodized aluminum oxide can be placed on a substrate with controlled thickness. Here we report a facile route to highly ordered nanoporous alumina with the thickness of hundreds-of-nanometer on a silicon wafer substrate. Hexagonally or tetragonally ordered nanoporous alumina could be prepared by way of thermal imprinting, dry etching, and anodization. Adoption of reusable polymer soft molds enabled the control of the thickness of the highly ordered porous alumina. It also increased reproducibility of imprinting process and reduced the expense for mold production and pattern generation. As nanoporous alumina templates are mechanically and thermally stable, we expect that the simple and costeffective fabrication through our method would be highly applicable in electronics industry.

Dry Synthesis of Nearly Monodisperse Spherical Silica (단분산에 가까운 구형 실리카의 건식 제조)

  • Park, Hoey Kyung;Park, Kyun Young
    • Korean Chemical Engineering Research
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    • v.45 no.6
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    • pp.677-679
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    • 2007
  • Nearly monodisperse spherical silica particles, 200~300 nm in diameter, were produced via a dry route for the first time through a two-stage hydrolysis of $SiCl_4$ vapor. In the first stage, the $SiCl_4$ was partially hydrolyzed in a batch reactor at $150^{\circ}C$ to form nearly monodisperse silicon oxychloride particles. In the second stage, the oxychlorides were hydrolyzed further in a tubular reactor to have produced silica with the morphology and size nearly conserved.

Laser via drilling technology for the EWT solar cell (EWT 태양전지 제작을 위한 레이저 미세 관통홀 가공 기술)

  • Lee, Hong-Gu;Seo, Se-Young;Hyun, Deoc-Hwan;Lee, Yong-Wha;Kim, Gang-Il;Jung, Woo-Won;Lee, Ah-Reum;Cho, Jaee-Ock
    • Journal of the Korean Solar Energy Society
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    • v.31 no.4
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    • pp.103-111
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    • 2011
  • Laser drilling of vias is the one of key technologies in developing Emitter-Wrap Through(EWT) solar cell which is particularly attractive due to the use of industrial processing and common solar grade p-type silicon materials. While alternative economically feasible drilling process is not available to date, the processing time and laser induced damage should be as small as possible in this process. This paper provides an overview on various factors that should be considered in using the laser via drilling technology for developing highly efficient and industrially applicable EWT solar cells.