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http://dx.doi.org/10.6117/kmeps.2011.18.4.049

High-Speed Cu Filling into TSV and Non-PR Bumping for 3D Chip Packaging  

Hong, Sung-Chul (Dept. of Mater. Sci. and Eng., University of Seoul)
Kim, Won-Joong (Dept. of Mater. Sci. and Eng., University of Seoul)
Jung, Jae-Pil (Dept. of Mater. Sci. and Eng., University of Seoul)
Publication Information
Journal of the Microelectronics and Packaging Society / v.18, no.4, 2011 , pp. 49-53 More about this Journal
Abstract
High-speed Cu filling into a through-silicon-via (TSV) and simplification of bumping process by electroplating for three dimensional stacking of Si dice were investigated. The TSV was prepared on a Si wafer by deep reactive ion etching, and $SiO_2$, Ti and Au layers were coated as functional layers on the via wall. In order to increase the filling rate of Cu into the via, a periodic-pulse-reverse wave current was applied to the Si chip during electroplating. In the bumping process, Sn-3.5Ag bumping was performed on the Cu plugs without lithography process. After electroplating, the cross sections of the vias and appearance of the bumps were observed by using a field emission scanning electron microscope. As a result, voids in the Cu-plugs were produced by via blocking around via opening and at the middle of the via when the vias were plated for 60 min at -9.66 $mA/cm^2$ and -7.71 $mA/cm^2$, respectively. The Cu plug with a void or a defect led to the production of imperfect Sn-Ag bump which was formed on the Cu-plug.
Keywords
electroplating; Cu filling; non-PR bumping; defect; scanning electron microscopy;
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Times Cited By KSCI : 2  (Citation Analysis)
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