• The Journal of Korean Physical Therapy
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• v.19 no.1
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• pp.67-78
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• 2007

Purpose: The purpose of this study were to examine the anti-hyperalgesic effects of combination of electroacupuncture and microcurrent on anti-hyperalgesia in local hyperalgesia zone. Methods: It used 24 rats for experiment, divided them into control group, electroacupuncture group (EA group), microcurrent group (MC group), combination of electroacupuncture with microcurrent (EA+MC group), caused hyperalgesia by injecting ${\lambda}-carrageenan$ into hindpaw. Thickness of hindpaw, mechanical pain threshold (MPT), thermal pain threshold (TPT), noxious flexion withdrawal reflex (NFR) and somatosensory evoked potential (SEP) were measured immediately after induction, at 24 hours, 48 hours and 72 hours after induction. The electrical stimulation was given once a day for three days, 20min per session. Results: Change of thickness, MPT, and TPT showed significant difference in all groups compared to control group. In particular, there were remarkable difference in EA+ME group. In particular there were remarkable differences in EA group and EA+MC group. Change of NFR(% threshold, % reaction time, % RMS) and SEP showed mainly significant differences in EA group and EA+ME group compared to control group. In particular, there were remarkable difference in EA+ME group. Conclusion: The above results suggest that appropriate combination of microcurrent with electroacupuncture for pain control will be very desirable.

• Journal of IKEEE
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• v.24 no.1
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• pp.284-292
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• 2020

SiC-based devices perform well in high-voltage environments of more than 1200V compared to silicon devices, and are particularly stable at very high temperatures. Therefore, 1700V UMOSFET has been actively researched and developed for the use of electric power systems such as electric vehicles and aircrafts. In this paper, we analysed thermal variations of critical variables (breakdown voltage (BV), on-resistance (R_on), threshold voltage (v_th), and transconductance (g_m)) for the three type 1700V UMOSFETs-Conventional UMOSFET (C-UMOSFET), Source Trench UMOSFET (ST-UMOSFET), and Local Floating Superjunction UMOSFET (LFS-UMOSFET). All three devices showed BV increase, R_on increase, v_th decrease, and g_m decrease with increasing temperature. However, there are differences in BV, R_on, v_th, g_m according to the structural differences of the three devices, and the degree and cause of the analysis were compared. All results were simulated using sentaurus TCAD.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.32 no.5
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• pp.371-375
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• 2019

Developing a thin-film transistor with characteristics such as a large area, high mobility, and high reliability are key elements required for the next generation on displays. In this paper, we have investigated the research trends related to improving the reliability of oxide-semiconductor-based thin-film transistors, which are the primary focus of study in the field of optical displays. It has been reported that thermal treatment in a high-pressure oxygen atmosphere reduces the threshold voltage shift from -7.1 V to -1.9 V under NBIS. Additionally, a device with a $SiO_2/Si_3N_4$ dual-structure has a lower threshold voltage (-0.82 V) under NBIS than a single-gate-insulator-based device (-11.6 V). The dual channel structure with different oxygen partial pressures was also confirmed to have a stable threshold voltage under NBIS. These can be considered for further study to improve the NBIS problem.

• The Korean Journal of Pain
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• v.7 no.2
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• pp.222-230
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• 1994

Acupuncture-like transcutaneous electrical nerve stimulation(ALTENS) on acupuncture site(dorsal and ventral side of finger) were compared with a placebo site(forearm) by infrared thermal imaging. Six disease-free volunteers underwent, on different days, an ALTENS treatment and a placebo treatment in a cross-over sequences of stimulation control and inhibition control in excess of 50 treatments. ALTENS treatments were given at 30Hz at an intensity just below pain threshold delivered to acupuncture points on fingers. Placebo stimulations were administered in similar manner. After every thirty minutes of ALTENS and placebo treatment with stimulation, inhibition control sequence and vice versa, we examined whole body infrared thermal imaging and checked changed skin temperature on frontal, anterior chest, upper and lower abdomen, dorsal and ventral aspect of hand, thoracic and lumbar area, anterior and posterior aspect of lower leg. There were significant skin temperature elevations with ALTENS treatment, especially finger control gate corresponding organ area. Placebo treatment revealed no skin temperature change. We concluded that ALTENS on finger control gate influence physiologic state as opposed to conventional electric stimulation.

• Proceedings of the Korean Vacuum Society Conference
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• 2013.08a
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• pp.241.2-241.2
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• 2013

최근, 비정질 산화물 반도체 thin film transistor (TFT)는 수소화된 비정질 실리콘 TFT와 비교하여 높은 이동도와 큰 on/off 전류비, 낮은 구동 전압을 가짐으로써 빠른 속도가 요구되는 차세대 투명 디스플레이의 TFT로 많은 연구가 진행되고 있다. 한편, 기존의 MOSFET 제작 시 우수한 박막을 얻기 위해서는 $500^{\circ}C$ 이상의 높은 열처리 온도가 필수적이며 이는 유리 기판과 플라스틱 기판에 적용하는 것이 적합하지 않고 높은 온도에서 수 시간 동안 열처리를 수행해야 하므로 공정 시간 및 비용이 증가하게 된다는 단점이 있다. 따라서, 본 연구에서는 RF sputter를 이용하여 증착된 비정질 InGaZnO pesudo MOSFET 소자를 제작하였으며, thermal 열처리와 microwave 열처리 방식에 따른 전기적 특성을 비교 및 분석하고 각 열처리 방식의 열처리 온도 및 조건을 최적화하였다. P-type bulk silicon 위에 산화막이 100 nm 형성된 기판에 RF 스퍼터링을 이용하여 InGaZnO 분말을 각각 1:1:2mol% 조성비로 혼합하여 소결한 타겟을 사용하여 70 nm 두께의 InGaZnO를 증착하였다. 연속해서 Photolithography 공정과 BOE(30:1) 습식 식각 과정을 이용해 활성화 영역을 형성하여 소자를 제작하였다. 제작 된 소자는 pseudo MOSFET 구조이며, 프로브 탐침을 증착 된 채널층 표면에 직접 접촉시켜 소스와 드레인 역할을 대체하여 동작시킬 수 있어 전기적 특성을 간단하고 간략화된 공정과정으로 분석할 수 있는 장점이 있다. 열처리 조건으로는 thermal 열처리의 경우, furnace를 이용하여 각각 $300^{\circ}C$, $400^{\circ}C$, $500^{\circ}C$, $600^{\circ}C$에서 30분 동안 N2 가스 분위기에서 열처리를 실시하였고, microwave 열처리는 microwave를 이용하여 각각 400 W, 600 W, 800 W, 1000 W로 20분 동안 실시하였다. 그 결과, furnace를 이용하여 열처리한 소자와 비교하여 microwave 를 통해 열처리한 소자에서 subthreshold swing (SS), threshold voltage (Vth), mobility 등이 개선되는 것을 확인하였다. 따라서, microwave 열처리 공정은 향후 저온 공정을 요구하는 MOSFET 제작 시의 훌륭한 대안으로 사용 될 것으로 기대된다.

• Analytical Science and Technology
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• v.15 no.1
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• pp.80-86
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• 2002

The simultaneous analysis of the odorous compounds designated by law in Korea and Japan was examined with the thermal desorber gas chromatography-mass spectrometry using one column. The approximate concentrations of trimethyl amine, acetaldehyde, methyl mercaptan and dimethyl sulfide were estimated. Styrene, dimethyl disulfide, propionaldehyde, n-butyl aldehyde, i-butyl aldehyde, n-valeraldehyde, i-valeraldehyde, ethyl acetate, toluene, xylene, methyl i-butyl ketone and i-butanol were detected at concentrations of the detection limits of their threshold values. As a typical example of simultaneous analysis of the odorous compounds, the volatile organic compounds emitted from compost procedure of food waste were concentrated and analyzed with thermal desorber/GC/MSD, and major malodorous compounds were estimated from the concentrations and threshold values of the detected components. From the result of analysis, 34 compounds were confirmed and among them, trimethyl amine, i-valeraldehyde, methyl mercaptan, methyl allyl sulfide, dimethyl sulfide, acetaldehyde, ethanol, n-butyaldehyde were expected to attribute to the odor in order of strength.

• Journal of the Korea Society of Computer and Information
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• v.17 no.6
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• pp.1-11
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• 2012

As the process technology scales down, multi-core processors cause serious problems such as increased interconnection delay, high power consumption and thermal problems. To solve the problems in 2D multi-core processors, researchers have focused on the 3D multi-core processor architecture. Compared to the 2D multi-core processor, the 3D multi-core processor decreases interconnection delay by reducing wire length significantly, since each core on different layers is connected using vertical through-silicon via(TSV). However, the power density in the 3D multi-core processor is increased dramatically compared to that in the 2D multi-core processor, because multiple cores are stacked vertically. Unfortunately, increased power density causes thermal problems, resulting in high cooling cost, negative impact on the reliability. Therefore, temperature should be considered together with performance in designing 3D multi-core processors. In this work, we analyze the temperature of the cache in quad-core processors varying cache organization. Then, we propose the low-temperature cache organization to overcome the thermal problems. Our evaluation shows that peak temperature of the instruction cache is lower than threshold. The peak temperature of the data cache is higher than threshold when the cache is composed of many ways. According to the results, our proposed cache organization not only efficiently reduces the peak temperature but also reduces the performance degradation for 3D quad-core processors.

• Korean Chemical Engineering Research
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• v.55 no.5
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• pp.623-628
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• 2017

Using wood pellets, which are used as fuel for thermal power generation plants, as test specimens, the minimum spontaneous ignition temperatures according to the size of the container for the test specimens were measured, and by applying the Frank-Kamenetskii theories on thermal energy to these temperatures, the danger factor of the materials were calculated by deriving the apparent activation energies. The results confirmed that the ignition threshold temperature decreased as the size of the container increased and that the spontaneous ignition energy was 37.83 kcal/mol. The results also confirmed that the larger the container for the test specimens was the time to arrive at the spontaneous ignition time and maximum temperature also increased.

• Proceedings of the Korean Vacuum Society Conference
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• 2015.08a
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• pp.209.1-209.1
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• 2015

Indium gallium zinc oxide (IGZO), indium zinc oxide (IZO) 그리고 zinc tin oxide (ZTO) 같은 zinc oxide 기반의 산화물 반도체는 높은 이동도, 투과도 그리고 유연성 같은 장점을 갖고 있어, display application의 backplane 소자로 적용되고 있다. 또한 최근에는 산화물 반도체를 이용한 thin-film transistor (TFT) 뿐만아니라 resistive random access memory (RRAM), flash memory 그리고 pH 센서 등 다양한 반도체 소자에 적용을 위한 연구가 활발히 진행 중이다. 그러나 zinc oxide 기반의 산화물 반도체의 전기 화학적 불안정성은 위와 같은 소자에 적용하는데 제약이 있다. 산화물 반도체의 안정성에 영향을 미치는 다양한 요인들 중 한 가지는, sputter 같은 plasma를 이용한 공정 진행 시 active layer가 plasma에 노출되면서 threshold voltage (Vth)가 급격하게 변화하는 plasma damage effect 이다. 급격한 Vth의 변화는 동작 전압의 불안정성을 가져옴과 동시에 누설전류를 증가시키는 결과를 초래 한다. 따라서 본 연구에서는, IGZO 기반의 TFT를 제작 후 plasma 분위기에 노출시켜, power와 노출 시간에 따른 전기적 특성 변화를 확인 하였다. 또한, thermal annealing을 적용하여 열처리 온도와 시간에 따른 Vth의 회복특성을 조사 하였다. 이러한 결과는 추후 산화물 반도체를 이용한 다양한 소자 설계 시 유용할 것으로 기대된다.

• The Plant Pathology Journal
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• v.33 no.2
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• pp.206-211
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• 2017

The effect of temperature on the rate of systemic infection of potatoes (Solanum tuberosum L. cv. Chu-Baek) by Potato virus Y (PVY) was studied in growth chambers. Systemic infection of PVY was observed only within the temperature range of $16^{\circ}C$ to $32^{\circ}C$. Within this temperature range, the time required for a plant to become infected systemically decreased from 14 days at $20^{\circ}C$ to 5.7 days at $28^{\circ}C$. The estimated lower thermal threshold was $15.6^{\circ}C$ and the thermal constant was 65.6 degree days. A systemic infection model was constructed based on experimental data, using the infection rate (Lactin-2 model) and the infection distribution (three-parameter Weibull function) models, which accurately described the completion rate curves to systemic infection and the cumulative distributions obtained in the PVY-potato system, respectively. Therefore, this model was useful to predict the progress of systemic infections by PVY in potato plants, and to construct the epidemic models.