• 제목/요약/키워드: Thermal Interface Material

검색결과 291건 처리시간 0.025초

$N_2O$ 가스에서 열산화막의 재산화에 의해 형성된 oxynitride막의 특성 (Properties of the oxynitride films prepared by reoxidation of thermal oxide in $N_2O$)

  • 배성식;이철인;최현식;서용진;김태형;김창일;장의구
    • 한국전기전자재료학회:학술대회논문집
    • /
    • 한국전기전자재료학회 1993년도 춘계학술대회 논문집
    • /
    • pp.39-43
    • /
    • 1993
  • Electricial characteristics of gate dielectrics prepared by reoxidation of thermal $SiO_2$ in nitrous oxide gas have been investigated. 10 and 19nm-thick oxides were reoxidized at temperatures of $900-1000^{\circ}C$ for 10-60 min in $N_2O$ ambient. As reoxidation proceeds, it is shown that nitrogen concentration at $Si/SiO_2$ interface increases gradually through the AES analysis. Nitrogen pile-up at $Si/SiO_2$ interface acts as a oxidant diffusion barrier that reduces the oxidation rate significantly. And it not only strengthen oxynitride structure at the interface but improve the gate dielectric qualities. Reliabilities of oxynitride films are conformed by the breakdown distributions and constant current stress technique. Therefore, the oxynitride films made by this process show a good promise for future ULSI applications.

  • PDF

Micromechanical failure analysis of composite materials subjected to biaxial and off-axis loading

  • Ahmadi, Isa
    • Structural Engineering and Mechanics
    • /
    • 제62권1호
    • /
    • pp.43-54
    • /
    • 2017
  • In this study, the failure behavior of composite material in the biaxial and off-axis loading is studied based on a computational micromechanical model. The model is developed so that the combination of mechanical and thermal loading conditions can be considered in the analysis. The modified generalized plane strain assumption of the theory of elasticity is used for formulation of the micromechanical modeling of the problem. A truly meshless method is employed to solve the governing equation and predict the distribution of micro-stresses in the selected RVE of composite. The fiber matrix interface is assumed to be perfect until the interface failure occurs. The biaxial and off-axis loading of the SiC/Ti and Kevlar/Epoxy composite is studied. The failure envelopes of SiC/Ti and Kevlar/Epoxy composite in off-axis loading, biaxial transverse-transverse and axial-transverse loading are predicted based on the micromechanical approach. Various failure criteria are considered for fiber, matrix and fiber-matrix interface. Comparison of results with the available results in the litreture shows excellent agreement with experimental studies.

레벨셋 기법의 물성 보간 방법에 대한 고찰 (ASSESSMENT OF PROPERTY INTERPOLATION METHODS IN LEVEL SET METHOD)

  • 박준권;오정민;강관형
    • 한국전산유체공학회:학술대회논문집
    • /
    • 한국전산유체공학회 2009년 춘계학술대회논문집
    • /
    • pp.283-289
    • /
    • 2009
  • In level set method, material properties are made to change smoothly across an interface of two materials with different properties by introducing an interpolation or smoothing scheme. So far, the weighted arithmetic mean (WAM) method has been exclusively adopted in level set method, without complete assessment for its validity. We showed here that the weighted harmonic mean (WHM) method for rate constants of various rate processes, including viscosity, thermal conductivity, electrical conductivity, and permittivity, gives much more accurate results than the WAM method. The selection of interpolation scheme is particularly important in multi-phase electrohydrodynamic problems in which driving force for fluid flow is electrical force exerted on the phase interface. Our analysis also showed that WHM method for both electrical conductivity and permittivity gives not only more accurate, but also more physically realistic distribution of electrical force at the interface. Our arguments are confirmed by numerical simulations of drop deformation under DC electric field.

  • PDF

초 고온·고압 소결 공정으로 제조된 다결정 다이아몬드 컴팩트의 열충격 특성에 미치는 다이아몬드 입자 크기의 영향 (Effect of Diamond Particle Size on the Thermal Shock Property of High Pressure High Temperature Sintered Polycrystalline Diamond Compact)

  • 김지원;백민석;박희섭;조진현;이기안
    • 한국분말재료학회지
    • /
    • 제23권5호
    • /
    • pp.364-371
    • /
    • 2016
  • This study investigates the thermal shock property of a polycrystalline diamond compact (PDC) produced by a high-pressure, high-temperature (HPHT) sintering process. Three kinds of PDCs are manufactured by the HPHT sintering process using different particle sizes of the initial diamond powders: $8-16{\mu}m$ ($D50=4.3{\mu}m$), $10-20{\mu}m$ ($D50=6.92{\mu}m$), and $12-22{\mu}m$ ($D50=8.94{\mu}m$). The microstructure observation results for the manufactured PDCs reveal that elemental Co and W are present along the interface of the diamond particles. The fractions of Co and WC in the PDC increase as the initial particle size decreases. The manufactured PDCs are subjected to thermal shock tests at two temperatures of $780^{\circ}C$ and $830^{\circ}C$. The results reveal that the PDC with a smaller particle size of diamond easily produces microscale thermal cracks. This is mainly because of the abundant presence of Co and WC phases along the diamond interface and the easy formation of Co-based (CoO, $Co_3O_4$) and W-based ($WO_2$) oxides in the PDC using smaller diamond particles. The microstructural factors for controlling the thermal shock property of PDC material are also discussed.

육방정 질화붕소 나노입자의 결정성에 미치는 불화칼슘 첨가의 영향 (Effect of CaF2 Addition on the Crystallinity of Hexagonal Boron Nitride Nanoparticles)

  • 정재용;김양도;김영국
    • 대한금속재료학회지
    • /
    • 제56권12호
    • /
    • pp.915-920
    • /
    • 2018
  • With the development of modern microelectronics technologies, the power density of electronic devices is rapidly increasing, due to the miniaturization or integration of device elements which operate at high frequency, high power conditions. Resulting thermal problems are known to cause power leakage, device failure and deteriorated performance. To relieve heat accumulation at the interface between chips and heat sinks, thermal interface materials (TIMs) must provide efficient heat transport in the through-plane direction. We report on the enhanced thermal conduction of $Al_2O_3-based$ polymer composites, fabricated by the surface wetting and texturing of thermally conductive hexagonal boron nitride(h-BN) nanoplatelets with large anisotropy in morphology and physical properties. The thermally conductive polymer composites were prepared with hybrid fillers of $Al_2O_3$ macro beads and surface modified h-BN nanoplatelets. Hexagonal boron nitride (h-BN) has high thermal conductivity and is one of the most suitable materials for thermally conductive polymer composites, which protect electronic devices by efficient heat dissipation. In this study, we synthesized hexagonal boron nitride nanoparticles by the pyrolysis of cost effective precursors, boric acid and melamine. Through pyrolysis at $900^{\circ}C$ and subsequent annealing at $1500^{\circ}C$, hexagonal boron nitride nanoparticles with diameters of ca. 50nm were synthesized. We demonstrate that the addition of a small amount of calcium fluoride ($CaF_2$) during the preparation of the melamine borate adduct significantly enhanced the crystallinity of the h-BN and assisted the growth of nanoplatelets up to 100nm in diameters. The addition of a small amount of h-BN enhanced the thermal conductivity of the $Al_2O_3-based$ polymer composites, from 1.45W/mK to 2.33 W/mK.

4H-SiC와 산화막 계면에 대한 혼합된 일산화질소 가스를 이용한 산화 후속 열처리 효과 (Effect of High-Temperature Post-Oxidation Annealing in Diluted Nitric Oxide Gas on the SiO2/4H-SiC Interface)

  • 김인규;문정현
    • 한국전기전자재료학회논문지
    • /
    • 제37권1호
    • /
    • pp.101-105
    • /
    • 2024
  • 4H-SiC power metal-oxide-semiconductor field effect transistors (MOSFETs) have been developed to achieve lower specific-on-resistance (Ron,sp), and the gate oxides have been thermally grown. The poor channel mobility resulting from the high interface trap density (Dit) at the SiO2/4H-SiC interface significantly affects the higher switching loss of the power device. Therefore, the development of novel fabrication processes to enhance the quality of the SiO2/4H-SiC interface is required. In this paper, NO post-oxidation annealing (POA) by using the conditions of N2 diluted NO at a high temperature (1,300℃) is proposed to reduce the high interface trap density resulting from thermal oxidation. The NO POA is carried out in various NO ambient (0, 10, 50, and 100% NO mixed with 100, 90, 50, and 0% of high purity N2 gas to achieve the optimized condition while maintaining a high temperature (1,300℃). To confirm the optimized condition of the NO POA, measuring capacitance-voltage (C-V) and current-voltage (I-V), and time-of-flight secondary-ion mass spectrometry (ToF-SIMS) are employed. It is confirmed that the POA condition of 50% NO at 1,300℃ facilitates the equilibrium state of both the oxidation and nitridation at the SiO2/4H-SiC interface, thereby reducing the Dit.

평판디스플레이를 위한 열압착법을 이용한 이방성 도전성 필름 접합 (Thermocompression Anisothropic Conductive Films(ACFs) bonding for Flat Panel Displays(FPDs) Application)

  • 박진석;조일제;신영의
    • 한국전기전자재료학회논문지
    • /
    • 제22권3호
    • /
    • pp.199-204
    • /
    • 2009
  • The effect of temperature on ACF thermocompression bonding for FPD assembly was investigated, It was found that Au bumps on driver IC's were not bonded to the glass substrate when the bonding temperature was below $140^{\circ}C$ so bonds were made at temperatures of $163^{\circ}C$, $178^{\circ}C$ and $199^{\circ}C$ for further testing. The bonding time and pressure were constant to 3 sec and 3.038 MPa. To test bond reliability, FPD assemblies were subjected to thermal shock storage tests ($-30^{\circ}C$, $1\;Hr\;{\leftrightarrow}80^{\circ}C$, 1 Hr, 10 Cycles) and func! tionality was verified by driver testing. It was found all of FPDs were functional after the thermal cycling. Additionally, Au bumps were bonded using ACF's with higher conductive particle densities at bonding temperatures above $163^{\circ}C$. From the experimental results, when the bonding temperature was increased from $163^{\circ}C$ to $199^{\circ}C$, the curing time could be reduced and more conductive particles were retained at the bonding interface between the Au bump and glass substrate.

나노급 CMOSFET을 위한 Boron Cluster(B18H22)가 이온 주입된(SOI 및 Bulk)기판에 Ni-V합금을 이용한 Ni-silicide의 열안정성 개선 (Improving the Thermal Stability of Ni-silicide using Ni-V on Boron Cluster Implanted Source/drain for Nano-scale CMOSFETs)

  • 이세광;이원재;장잉잉;종준;정순연;이가원;왕진석;이희덕
    • 한국전기전자재료학회논문지
    • /
    • 제20권6호
    • /
    • pp.487-490
    • /
    • 2007
  • In this paper, the formation and thermal stability characteristics of Ni silicide using Ni-V alloy on Boron cluster ($B_{18}H_{22}$) implanted bulk and SOI substrate were examined in comparison with pure Ni for nano-scale CMOSFET. The Ni silicide using Ni-V alloy on $B_{18}H_{22}$ implanted SOI substrate after high temperature post-silicidation annealing showed the lower sheet resistance, no agglomeration interface image and lower surface roughness than that using pure Ni. The thermal stability of Ni silicide was improved by using Ni-V alloy on $B_{18}H_{22}$ implanted SOI substrate.

저온 중수소 어닐링을 활용한 Enclosed-Layout Transistors (ELTs) 소자의 제작 및 전기적 특성분석 (Fabrication of Enclosed-Layout Transistors (ELTs) Through Low-Temperature Deuterium Annealing and Their Electrical Characterizations)

  • 왕동현;김동호;길태현;연지영;김용식;박준영
    • 한국전기전자재료학회논문지
    • /
    • 제37권1호
    • /
    • pp.43-47
    • /
    • 2024
  • The size of semiconductor devices has been scaled down to improve packing density and output performance. However, there is uncontrollable spreading of the dopants that comprise the well, punch-stop, and channel-stop when using high-temperature annealing processes, such as rapid thermal annealing (RTA). In this context, low-temperature deuterium annealing (LTDA) performed at a low temperature of 300℃ is proposed to reduce the thermal budget during CMOS fabrication. The LTDA effectively eliminates the interface trap in the gate dielectric layer, thereby improving the electrical characteristics of devices, such as threshold voltage (VTH), subthreshold swing (SS), on-state current (ION), and off-state current (IOFF). Moreover, the LTDA is perfectly compatible with CMOS processes.

Damage Mechanism of Asphalt Concrete under Low Temperatures

  • Kim, Kwang-Woo;Yeon, Kyu-Seok;Park, Je-Seon
    • 한국콘크리트학회:학술대회논문집
    • /
    • 한국콘크리트학회 1994년도 가을 학술발표회 논문집
    • /
    • pp.200-204
    • /
    • 1994
  • Low temperature associated damage mechanism is not well known for asphalt concrete. Many studies have related the thermal cracking of pavement in the roadway in cold region with overall shrinkage of the pavement surface under assumption of homogeneous material. This study, however, was intiated based on the assumption that thermal incompatibility of materials (heterogeneous) in asphalt concrete mixture would be the primary cause of the damages. Acoustic emission technique and microscopic obsevation were employed to evaluate damage mechanism of asphalt concrete due to low temperature. The first method showed the sufficient evidence that asphalt concrete could be damaged by lowered temperature only. The second method showed that the damage by temperature resulted in micro-cracks at the interface between asphalt matrix and aggregate particle. It was concluded that these damage mechanisms were the primary cause of major thermal cracking of asphalt pavement in cold region.

  • PDF