• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2002년도 하계학술대회 논문집
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• pp.202-205
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• 2002

Polycrystalline silicon thin film transistors (poly-Si TFTs) are used in a wide variety of applications, and will figure prominently future high-resolution, high-performance flat panel display technology However, it was very difficult to fabricate high performance poly-Si TFTs at a temperature lower than 300$^{\circ}C$ for glass substrate. Conventional process on a glass substrate were limited temperature less than 600$^{\circ}C$ This paper proposes a high temperature process above 750$^{\circ}C$ using a flexible molybdenum substrate deposited hydrogenated amorphous silicon (a-Si:H) and than crystallized a rapid thermal processor (RTP) at the various temperatures from 750$^{\circ}C$ to 1050$^{\circ}C$. The high temperature annealed poly-Si film illustrated field effect mobility higher than 30 $\textrm{cm}^2$/Vs, achieved I$\sub$on//I$\sub$off/ current ratio of 10$^4$ and crystall volume fraction of 92%. In this paper, we introduce the new TFTs Process as flexible substrate very promising roll-to-roll process, and exhibit the properties of high temperature crystallized poly-Si Tn on molybdenum substrate.

• 한국전기전자재료학회논문지
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• 제23권5호
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• pp.349-352
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• 2010

Thin-film transistors (TFTs) were fabricated using amorphous indium gallium zinc oxide (a-IGZO) channels by rf-magnetron sputtering at room temperature. We have studied the effect of oxygen partial pressure on the threshold voltage($V_{th}$) of a-IGZO TFTs. Interestingly, the $V_{th}$ value of the oxide TFTs are slightly shifted in the positive direction due to increasing $O_2$ partial pressure from 0.007 to 0.009 mTorr. The device performance is significantly affected by varying $O_2$ ratio, which is closely related with oxygen vacancies provide the needed free carriers for electrical conduction.

• 대한전자공학회논문지SD
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• 제48권3호
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• pp.1-6
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• 2011

N-channel 산화물 박막 트랜지스터(Thin Film Transistor, 이하 TFT)만을 이용한 저소비전력 inverter, NAND, NOR의 논리 게이트 회로를 제안한다. 제안된 회로는 asymmetric feed-through와 bootstrapping을 이용해서 pull-up, pull-down 스위치가 동시에 켜지지 않도록 설계하였다. 그 결과로 출력신호 전압 범위가 입력신호 전압과 동일하고 정전류가 흐르지 않는다. 인버터는 5 개의 TFT와 2 개의 capacitor로, NAND 및 NOR 게이트는 각각 10 개의 TFT와 4 개의 capacitor로 구성된다. 산화물 TFT 모델을 사용하여 SPICE 시뮬레이션을 수행하여 제안된 회로의 동작을 성공적으로 검증하였다.

• 한국결정성장학회지
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• 제17권5호
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• pp.187-191
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• 2007

The device performance of ZnO-thin film transistors(ZnO-TFTs) with gate dielectrics of $SiO_2,\;SiN_x$ and Polyvinylphenol(PVP) having a bottom gate configuration were investigated. ZnO-TFTs can induce high device performance with low intrinsic carrier concentration of ZnO only by controlling gas flow rates without additional doping or annealing processes. The field effect mobility and on/off ratio of ZnO-TFTs with $SiN_x$ were $20.2cm^2V^{-1}s^{-1}\;and\;5{\times}10^6$ respectively which is higher than those previously reported. The device adoptable values of the mobility of $1.37cm^2V^{-1}s^{-1}$ and the on/off ratio of $6{\times}10^3$ were evaluated from the device with organic PVP dielectric.

• 한국응용과학기술학회지
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• 제30권2호
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• pp.290-296
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• 2013

We analysed interfacial traps in organic thin-film transistors (TFTs) in which pentacene and 6,13-bis(triisopropylsilylethynyl)-pentacene (TIPS-pentacene) organic semiconductors were deposited by means of vacuum-thermal evaporation and drop-coating methods, respectively. The thermally-deposited pentacene film consists of dentritic grains with the average grain size of around 1 m, while plate-like crystals over a few hundred microns are observed in the solution-processed TIPS-pentacene film. From the transfer characteristics of both TFTs, lower subthreshold slope of 1.02 V/decade was obtained in the TIPS-pentacene TFT, compared to that (2.63 V/decade) of the pentacene transistor. The interfacial trap density values calculated from the subthreshold slope are about $3.4{\times}10^{12}/cm^2$ and $9.4{\times}10^{12}/cm^2$ for the TIPS-pentacene and pentacene TFTs, respectively. Herein, lower subthreshold slope and less interfacial traps in TIPS-pentacene TFTs are attributed to less domain boundaries in the solution-processed TIPS-pentacene film.

• Journal of Information Display
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• 제10권4호
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• pp.137-142
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• 2009

Transparent top-gate Al-Zn-Sn-O (AZTO) thin-film transistors (TFTs) with an $Al_2O_3$ protective layer (PL) on an active layer were studied, and a transparent 2.5-inch QCIF+AMOLED (active-matrix organic light-emitting diode) display panel was fabricated using an AZTO TFT backplane. The AZTO active layers were deposited via RF magnetron sputtering at room temperature, and the PL was deposited via two different atomic-layer deposition (ALD) processes. The mobility and subthreshold slope were superior in the TFTs annealed in vacuum and with oxygen plasma PLs compared to the TFTs annealed in $O_2$ and with water vapor PLs, but the bias stability of the TFTs annealed in $O_2$ and with water vapor PLs was excellent.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2009년도 9th International Meeting on Information Display
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• pp.546-549
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• 2009

In this paper, we investigated the effects of different source/drain (S/D) electrode materials in thin film transistors (TFTs) based on indium-gallium-zinc oxide (IGZO) semiconductor. A transfer length and effective resistances between S/D electrodes and amorphous IGZO thin-film transistors were examined. Intrinsic TFT parameters were extracted by the transmission line method (TLM) using a series of TFTs with different channel lengths measured at a low drain voltage. The TFTs fabricated with Cu S/D electrodes showed the lowest contact resistance and transfer length indicating good ohmic characteristics, and good transfer characteristics with a field-effect mobility (${\mu}_{FE}$) of 10.0 $cm^2$/Vs.

• 전자공학회논문지D
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• 제35D권12호
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• pp.68-74
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• 1998

본 논문에서는 electron cyclotron resonance (ECR) N₂O-플라즈마 산화막을 게이트 산화막으로 사용한 다결정 실리콘 박막 트랜지스터 (TFT)의 성능과 단채널 특성에 대하여 연구하였다. ECR NE₂O-플라즈마 게이트 산화막을 사용한 소자는 열산화막을 이용한 경우에 비해 우수한 성능과 억제된 단채널 효과를 나타낸다. 얇은 ECR N2O-플라즈마 산화막을 사용하여 n채널 TFT의 경우 3 ㎛, p채널 TFT의 경우 1㎛ 게이트 길이까지 문턱 전압 감소가 없는 소자를 얻었다. 이러한 특성 향상은 부드러운 계면, passivation 효과, 그리고 계면과 박막 내부에 존재하는 강한 Si ≡ N 결합 등에 기인한다.

• 한국전기전자재료학회논문지
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• 제24권9호
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• pp.693-696
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• 2011

Recently, amorphous oxide semiconductors (AOSs) based thin-film transistors (TFTs) have received considerable attention for application in the next generation displays industry. The research trends of AOSs based TFTs investigation have focused on the high device performance. The electrical properties of the TFTs are influenced by trap density. In particular, the threshold voltage ($V_{th}$) and subthreshold swing (SS) essentially depend on the semiconductor/gate-insulator interface trap. In this article, we investigated the effects of Ar plasma-treated $SiO_2$ insulator on the interfacial property and the device performances of amorphous indium gallium zinc oxide (a-IGZO) TFTs. We report on the improvement in interfacial characteristics between a-IGZO channel layer and gate insulator depending on Ar power in plasma process, since the change of treatment power could result in different plasma damage on the interface.

• 한국재료학회지
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• 제19권1호
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• pp.24-27
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• 2009

Indium Gallium Zinc Oxide (IGZO) thin films were deposited onto 300 nm-thick oxidized Si substrates and glass substrates by direct current (DC) magnetron sputtering of IGZO targets at room temperature. FESEM and XRD analyses indicate that non-annealed and annealed IGZO thin films exhibit an amorphous structure. To investigate the effect of an annealing treatment, the films were thermally treated at $300^{\circ}C$ for 1hr in air. The IGZO TFTs structure was a bottom-gate type in which electrodes were deposited by the DC magnetron sputtering of Ti and Au targets at room temperature. The non-annealed and annealed IGZO TFTs exhibit an $I_{on}/I_{off}$ ratio of more than $10^5$. The saturation mobility and threshold voltage of nonannealed IGZO TFTs was $4.92{\times}10^{-1}cm^2/V{\cdot}s$ and 1.46V, respectively, whereas these values for the annealed TFTs were $1.49{\times}10^{-1}cm^2/V{\cdot}$ and 15.43V, respectively. It is believed that an increase in the surface roughness after an annealing treatment degrades the quality of the device. The transmittances of the IGZO thin films were approximately 80%. These results demonstrate that IGZO thin films are suitable for use as transparent thin film transistors (TTFTs).