• 대한전자공학회논문지SD
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• 제46권1호
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• pp.52-58
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• 2009

심장박동 조절장치를 위한 저전압 저전력 델타 시그마 모듈레이터를 제안하였다. 제안된 회로는 feedforward 구조를 이용한 델타 시그마 모듈레이터 단을 계단식 형태로 설계하였으며, 이를 통하여 저전압 환경에서도 비교적 높은 해상도를 구현할 수 있었다. 인버터 기반의 스위치드 커패시터 회로를 이용하여 전력소모를 최소화하고, 낮은 전압에서도 동작 가능하도록 설계되었다. 제안된 회로는 $0.35-{\mu}m$ CMOS 공정을 이용하여 구현되었으며, 샘플링 주파수가 7.6 kHz 이고 120Hz 대역폭에서 61-dB SNDR, 63-dB SNR, 그리고 65-dB DR 을 가진다. 이때 전력소모는 1-V 전원전압에서 280 nW에 불과하다.

• 전자공학회논문지S
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• 제34S권5호
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• pp.94-103
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• 1997

It is necesary that analog buffer circuit should drive an external load in the VLSI design such as switched capacitor efilter (SCF), D/A converter, A/d converter, telecommunicatin circuit, etc. The conventional CMOS buffer circuit have many probvlems according as CMOS technique. Firstly, Capacity of large load ar enot able to opeate well. The problem can be solve to use class AB stages. But large load are operated a difficult, because an element of existing CMOS has a quadratic functional relation with inptu and outut voltage versus output current. Secondly, whole circuit of dynamic rang edecrease, because a range of inpt and output voltages go down according as increasing of intergration rate drop supply voltage. In this paper suggests that new differential CMOS line driver make out of operating an external of large load. In telecommunication's chip case transmission line could be a load. It is necessary that a load operate line driver. The proposal circuit is planned to hav ea high generation power rnage of voltage with preservin linearity. And circuit of capability is inspected through simulation program (HSPICE).

• Journal of Electrical Engineering and Technology
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• 제6권4호
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• pp.505-512
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• 2011

A novel passive boost power converter forsingle-phaseswitched reluctance motor is presented. A simple passive circuit is proposed comprisingthree diodes and one capacitor. The passive circuitis added in the front-end of a conventional asymmetric converter to obtain high negative bias. Based on this passive network, the terminal voltage of the converter side is a general DC-link voltage level in parallel mode up to a double DC-link voltage level in series mode. Thus,it can suppress the negative torque generation from the tail current and improve the output power. The results of the comparative simulation and experiments forthe conventional and proposed converter verify the performance of the proposed converter.

• Journal of Power Electronics
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• 제14권4호
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• pp.661-670
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• 2014

A new DC/DC converter with zero voltage switching is proposed for applications with high input voltage and high load current. The proposed converter has two circuit modules that share load current and power rating. Interleaved pulse-width modulation (PWM) is adopted to generate switch control signals. Thus, ripple currents are reduced at the input and output sides. For high-voltage applications, each circuit module includes two half-bridge legs that are connected in series to reduce switch voltage rating to $V_{in}/2$. These legs are controlled with the use of asymmetric PWM. To reduce the current rating of rectifier diodes and share load current for high-load-current applications, two center-tapped rectifiers are adopted in each circuit module. The primary windings of two transformers are connected in series at the high voltage side to balance output inductor currents. Two series capacitors are adopted at the AC terminals of the two half-bridge legs to balance the two input capacitor voltages. The resonant behavior of the inductance and capacitance at the transition interval enable MOSFETs to be switched on under zero voltage switching. The circuit configuration, system characteristics, and design are discussed in detail. Experiments based on a laboratory prototype are conducted to verify the effectiveness of the proposed converter.

• KIEE International Transaction on Electrical Machinery and Energy Conversion Systems
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• 제3B권1호
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• pp.1-9
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• 2003

This paper deals with the nodal admittance approach steady-state frequency domain analysis of the three-phase self-excited induction generator (SEIG) driven by the variable speed prime mover as the wind turbine. The steady-state performance analysis of this power conditioner designed for the renewable energy is based on the principle of equating the input mechanical power of the three-phase SEIG to the output mechanical power of the variable speed prime mover mentioned above. Us-ing the approximate frequency domain based equivalent circuit of the three-phase SEIG. The main features of the present algorithm of the steady-state performance analysis of the three-phase SEIG treated here are that the variable speed prime mover characteristics are included in the approximate equivalent circuit of the three-phase SEIG under the condition of the speed changes of the prime mover without complex computations processes. Furthermore, a feedback closed-loop voltage regulation of the three-phase SEIG as a power conditioner which is driven by variable speed prime movers such as the wind turbine(WT) employing the static VAR compensator(SVC) circuit composed of the thyristor phase controlled reactor(TCR) and the thyristor switched capacitor(TSC) controlled by the PI controller is designed and considered for wind-turbine driving power conditioner.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2004년도 춘계학술대회 논문집 전기기기 및 에너지변환시스템부문
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• pp.166-168
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• 2004

Conventional Switched Mode Power Supplies(SMPS) with diode-capacitor rectifier have distorted input current waveform with high harmonic order contents. Typically, these SMPS have a power factor lower than 0,7. To improve with this problem the power factor correction(PFC) circuit of power supplies has to be introduced. Specially, to the reduce size and manufacture cost of power conversion device, the single-stage PFC converter is increased to demand as necessary of study. In this paper, comparative analysis of Valley-fill, boost and feedforward type single stage power factor correction circuit based on the flyback converter is given. Also, the validity of designed three type of single stage PFC circuit are confirmed by simulation and experimental results.

• 대한전자공학회논문지SD
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• 제44권2호
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• pp.25-33
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• 2007

본 논문에서는 높은 dynamic range(DR)를 얻을 수 있는 단일-비트 4차 델타-시그마 모듈레이터를 제시하였으며, 이를 구현하였다. 본 모듈레이터에 사용된 루프 필터의 구조는 피드백 패스와 피드포워드 패스를 혼합하여 사용한 구조이며, 스위치-커패시터(switched-capacitor) 방식으로 구현되었다. 측정 결과로는 20kHz의 기저대역(base band)에서 3.2MHz의 클록을 사용하였을 때 최대 99dB의 DR을 얻었다. 본 모듈레이터는 $0.18{\mu}m$ standard CMOS 공정으로 만들어졌다.

• 한국정보통신학회논문지
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• 제14권8호
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• pp.1887-1894
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• 2010

본 논문에서는 차량 레이더용 새로운 형태의 스위치 커패시터 시그마-델타 변조기를 제안한다. 개발된 변조기는 차량 레이더 시스템에서 고주파 대역 신호의 고해상도 데이터 변환, 즉 아날로그-디지털변환을 수행하는데 사용된다. 2.7V의 저전압 동작이 가능하며, 저 왜곡 특성을 가진 몸체효과 보상형 스위치 구조를 가진다. 이러한 변조기는0.25 마이크론 이중 폴리 3-금속 표준 CMOS 공정으로 제작되었고, $1.9 {\times}1.5mm^{2}$ 의 다이 면적을 차지한다. 제안된 회로는 2.7V의 동작 전압에서 기존의 부트스트랩형 회로보다 약 20dB 향상된 우수한 총 고조파 왜곡 특성을 보였다.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2009년도 9th International Meeting on Information Display
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• pp.1578-1581
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• 2009

This work describes a power and area efficient switched-capacitor cyclic DAC for mobile display drivers. The proposed DAC can be simply implemented with one opamp two capacitors and several switches. Furthermore, the op-amp input referred offset is attenuated at the DAC output without additional offset cancellation circuitry. The operation of the cyclic DAC is verified through circuit level simulations.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2017년도 전력전자학술대회
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• pp.172-173
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• 2017

본 논문은 벅 차동전력조절 회로가 적용 된 다출력 스위치드-커패시터 부스트 컨버터의 소신호 모델 분석에 대한 논문이다. 제안하는 회로는 각 태양광 모듈의 최대전력점을 추정하기 위해서 제어된다. 제안하는 회로는 상태 공간 평균화 기법과 시그널 플로우 그래프를 통해서 해석하였으며 PSIM과 MATLAB을 통해서 증명하였다.