• Title/Summary/Keyword: Subthreshold

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Analysis of Dimension Dependent Subthreshold Swing for FinFET Under 20nm (20nm이하 FinFET의 크기변화에 따른 서브문턱스윙분석)

  • Jung, Hak-Kee
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.10 no.10
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    • pp.1815-1821
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    • 2006
  • In this paper, the subthreshold swing has been analyzed for FinFET under channel length of 20nm. The analytical current model has been developed , including thermionic current and tunneling current models. The potential distribution by Poisson equation and carrier distribution by Maxwell-Boltzman statistics are used to calculate thermionic emission current and WKB(Wentzel-Kramers-Brillouin) approximation to tunneling current. The cutoff current is obtained by simple adding two currents since two current is independent. The subthreshold swings by this model are compared with those by two dimensional simulation and two values agree well. Since the tunneling current increases especially under channel length of 10nm, the characteristics of subthreshold swing is degraded. The channel and gate oxide thickness have to be fabricated as am as possible to decrease this short channel effects, and this process has to be developed. The subthreshold swings as a function of channel doping concentrations are obtained. Note that subthreshold swings are resultly constant at low doping concentration.

Dependence of Subthreshold Current for Channel Structure and Doping Distribution of Double Gate MOSFET (DGMOSFET의 채널구조 및 도핑분포에 따른 문턱전압이하 전류의존성)

  • Jung, Hak-Kee
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.16 no.4
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    • pp.793-798
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    • 2012
  • In this paper, dependence of subthreshold current has been analyzed for doping distribution and channel structure of double gate(DG) MOSFET. The charge distribution of Gaussian function validated in previous researches has been used to obtain potential distribution in Poisson equation. Since DGMOSFETs have reduced short channel effects with improvement of current controllability by gate voltages, subthreshold characteristics have been enhanced. The control of current in subthreshold region is very important factor related with power consumption for ultra large scaled integration. The deviation of threshold voltage has been qualitatively analyzed using the changes of subthreshold current for gate voltages. Subthreshold current has been influenced by doping distribution and channel dimension. In this study, the influence of channel length and thickness on current has been analyzed according to intensity and distribution of doping.

Analysis of subthreshold region transport characteristics according to channel thickness for DGMOSFET (DGMOSFET의 채널두께에 따른 문턱전압이하영역에서의 전송특성분석)

  • Han, Ji-Hyung;Jung, Hak-Kee;Lee, Jong-In;Jeong, Dong-Soo;Kwon, Oh-Shin
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2010.10a
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    • pp.737-739
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    • 2010
  • In this paper, the subthreshold characteristics have been alanyzed using MicroTec4.0 for double gate MOSFET(DGMOSFET). The technology for characteristic analysis of device for high integration is changing rapidly. Therefore to understand characteristics of high-integrated device by computer simulation and fabricate the device having such characteristics became one of very important subjects. The oxide thickness and channel thickness in DG MOSFET determines threshold voltage and extensively influences on Ss(Subthreshold swing). We have investigated the threshold voltage and Ss(Subthreshold swing) characteristics according to variation of channel thickness from 1nm to 3nm in this study.

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Analysis for Gate Oxide Dependent Subthreshold Swing of Asymmetric Double Gate MOSFET (비대칭 DGMOSFET의 문턱전압이하 스윙에 대한 게이트 산화막 의존성 분석)

  • Jung, Hakkee
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.18 no.4
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    • pp.885-890
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    • 2014
  • This paper has presented the change of subthreshold swings for gate oxide thickness of asymmetric double gate(DG) MOSFET, and solved Poisson equation to obtain the analytical solution of potential distribution. The Gaussian function as doping distribution is used to approch experimental results. The symmetric DGMOSFET is three terminal device. Meanwhile the asymmetric DGMOSFET is four terminal device and can separately determine the bias voltage and oxide thickness for top and bottom gates. As a result to observe the subthreshold swings for the change of top and bottom gate oxide thickness, we know the subthreshold swings are greatly changed for gate oxide thickness. Especially we know the subthreshold swings are increasing with the increase of top and bottom gate oxide thickness, and top gate oxide thickness greatly influences subthreshold swings.

Analysis for Relation of Oxide Thickness and Subthreshold Swing of Asymmetric Double Gate MOSFET (비대칭 DGMOSFET의 산화막 두께와 문턱전압이하 스윙의 관계 분석)

  • Jung, Hakkee;Cheong, Dongsoo
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2013.10a
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    • pp.698-701
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    • 2013
  • This paper has presented the change of subthreshold swings for gate oxide thickness of asymmetric double gate(DG) MOSFET, and solved Poisson equation to obtain the analytical solution of potential distribution. The symmetric DGMOSFET is three terminal device. Meanwhile the asymmetric DGMOSFET is four terminal device and can separately determine the bias voltage and oxide thickness for top and bottom gates. As a result to observe the subthreshold swings for the change of top and bottom gate oxide thickness, we know the subthreshold swings are greatly changed for gate oxide thickness. Especially we know the subthreshold swings are increasing with the increase of top and bottom gate oxide thickness, and top gate oxide thickness greatly influences subthreshold swings.

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Analysis of Subthreshold Swing for Channel Length of Asymmetric Double Gate MOSFET (채널길이에 대한 비대칭 이중게이트 MOSFET의 문턱전압이하 스윙 분석)

  • Jung, Hakkee
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.19 no.2
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    • pp.401-406
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    • 2015
  • The change of subthreshold swing for channel length of asymmetric double gate(DG) MOSFET has been analyzed. The subthreshold swing is the important factor to determine digital chracteristics of transistor and is degraded with reduction of channel. The subthreshold swing for channel length of the DGMOSFET developed to solve this problem is investigated for channel thickness, oxide thickness, top and bottom gate voltage and doping concentration. Especially the subthreshold swing for asymmetric DGMOSFET to be able to be fabricated with different top and bottom gate structure is investigated in detail for bottom gate voltage and bottom oxide thickness. To obtain the analytical subthreshold swing, the analytical potential distribution is derived from Possion's equation, and Gaussian distribution function is used as doping profile. As a result, subthreshold swing is sensitively changed according to top and bottom gate voltage, channel doping concentration and channel dimension.

SOI 기판 위에 SONOS 구조를 가진 플래쉬 메모리 소자의 subthreshold 전압 영역의 전기적 성질

  • Yu, Ju-Tae;Kim, Hyeon-U;Yu, Ju-Hyeong;Kim, Tae-Hwan
    • Proceedings of the Korean Vacuum Society Conference
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    • 2010.08a
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    • pp.216-216
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    • 2010
  • Floating gate를 이용한 플래시 메모리와 달리 질화막을 트랩 저장층으로 이용한 silicon-oxide-silicon nitride-oxide silicon (SONOS) 구조의 플래시 메모리 소자는 동작 전압이 낮고, 공정과정이 간단하며 비례 축소가 용이하여 고집적화하는데 유리하다. 그러나 SONOS 구조의 플래시 메모리소자는 비례 축소함에 따라 단 채널 효과와 펀치스루 현상이 커지는 문제점이 있다. 비례축소 할 때 발생하는 문제점을 해결하기 위해 플래시 메모리 소자를 FinFET과 같이 구조를 변화하는 연구는 활발히 진행되고 있으나, 플래시 메모리 소자를 제작하는 기판의 변화에 따른 메모리 소자의 전기적 특성 변화에 대한 연구는 많이 진행되지 않았다. 본 연구에서는 silicon-on insulator (SOI) 기판의 유무에 따른 멀티비트를 구현하기 위한 듀얼 게이트 가진 SONOS 구조를 가진 플래시 메모리 소자의 subthreshold 전압 영역에서의 전기적 특성 변화를 조사 하였다. 게이트 사이의 간격이 감소함에 따라 SOI 기판이 있을 때와 없을 때의 전류-전압 특성을 TCAD Simulation을 사용하여 계산하였다. 전류-전압 특성곡선에서 subthreshold swing을 계산하여 비교하므로 SONOS 구조의 플래시 메모리 소자에서 SOI 기판을 사용한 메모리 소자가 SOI 기판을 사용하지 않은 메모리 소자보다 단채널효과와 subthreshold swing이 감소하였다. 비례 축소에 따라 SOI 기판을 사용한 메모리 소자에서 단채널 효과와 subthreshold swing이 감소하는 비율이 증가하였다.

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Study of MOSFET Subthreshold Hump Characteristics by Phosphorous Auto-doping

  • Lee, Jun-Gi;Kim, Hyo-Jung;Kim, Gwang-Su;Choe, Byeong-Deok
    • Proceedings of the Korean Vacuum Society Conference
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    • 2012.02a
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    • pp.319-319
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    • 2012
  • 현재 폭넓게 이용되고 있는 STI (Shallow Trench Isolation) 공정에서 active edge 부분에 발생하는 기생 transistor의 subthreshold hump 특성을 제어하는 연구가 활발히 이루어지고 있다. 일반적으로 STI 공정을 이용하는 MOSFET에서 active edge 부분의 얇게 형성된 gate oxide, sharp한 active edge 형성, STI gap-fill 공정 중에 생기는 channel dopant out-diffusion은 subthreshold hump 특성의 주된 요인이다. 이와 같은 문제점을 해결하기 위해 active edge rounding process와 channel dopant compensation의 implantation을 이용하여 subthresold hump 특성 개선을 연구하였다. 본 연구는 STI 공정에 필요한 wafer와 phosphorus를 함유한 wafer를 한 chamber 안에서 auto-doping하는 방법을 이용하여 subthresold hump 특성을 구현하였다. phosphorus를 함유한 wafer에서 빠져나온 phosphorus가 STI 공정중인 wafer로 침투하여, active edge 부분의 channel dopant인 boron 농도를 상대적으로 낮춰 active edge 부분의 가 감소하고 leakage current를 증가시킨다. transistor의 channel length, gate width이고, wafer#No가 클수록 phosphorous를 함유한 wafer까지의 거리는 가까워진다. wafer #01은 hump 특성이 없고, wafer#20은 에서 심한 subthreshold hump 특성을 보였다. channel length 고정, gate width를 ~으로 가변하여 width에 따른 영향을 실험하였다. active 부분에 대한 SCM image로 확인된 phosphorus에 의한 active edge 부분의 boron 농도 감소와 gate width vs curve에서 확인된 phosphorus에 의한 감소가 narrow width로 갈수록 커짐을 확인하였다.

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Improved Nonlinear Subthreshold Region Model For HEMTs (개선된 HEMT 비선형 서브임계전압 영역모델)

  • Kim, Yeong-Min
    • ETRI Journal
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    • v.11 no.4
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    • pp.98-104
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    • 1989
  • Closed form solution of nonlinear 2-DEG concentration formula is proposed. This allows us to model continuous 2-DEG charge concentration as the function of gate voltage covering subthreshold region of the I-V curves. Comparisons of the Ids-Vgs characteristics and transconductance with the measured data were performed to show the accuracy of the proposed model. This way we have completely closed form I-V characteristics in subthreshold, triode and saturation region incorporating accurate charge control mechanism for HEMTs.

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Anomalous Subthreshold Characteristics of Shallow Trench-Isolated Submicron NMOSFET with Capped p-TEOS/SiN

  • Lee, Hyung J.
    • Transactions on Electrical and Electronic Materials
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    • v.3 no.3
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    • pp.18-20
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    • 2002
  • In sub-l/4 ${\mu}{\textrm}{m}$ NMOSFET with STI (Shallow Trench Isolation), the anomalous hump phenomenon of subthreshold region, due to capped p-TEOS/SiN induced defect, is reported. The hump effect was significantly observed as channel length is reduced, which is completely different from previous reports. Channel boron dopant redistribution due to the defect should be considered to improve hump characteristics besides considerations of STI comer and recess. 130