• Title/Summary/Keyword: Solder Bonding

Search Result 171, Processing Time 0.038 seconds

Development of Ultrasonic Bonding Process for Micro Components (미세 부품의 초음파 접합공정 개발)

  • 김정호;이지혜;유중돈;최두선
    • Transactions of Materials Processing
    • /
    • v.11 no.7
    • /
    • pp.596-600
    • /
    • 2002
  • The ultrasonic bonding method and its feasibility are investigated in this work for joining the micro components and MEMS packaging. The ultrasonic bonding process is analyzed using a lumped mode, and preliminary experiments using the eutectic solder and copper pin were carried out to verify possibility to MEMS packaging. The ultrasonic bonding process appears to be adequate for MEMS packaging by providing localized heating at the selected area. Microscopic behavior of the bond joint through ultrasonic vibration needs further investigation.

Chip on Glass Technologies for High-Performance LCD Applications

  • Kim, Young-Ho
    • Proceedings of the International Microelectronics And Packaging Society Conference
    • /
    • 2002.09a
    • /
    • pp.203-215
    • /
    • 2002
  • Using eutectic In-Ag and Bi-Sn solder materials, we developed the COG technique having a minimum pitch of 50 ${\mu}{\textrm}{m}$. The maximum temperature in this process is $160^{\circ}C$. We fabricated spherical and uniform solder bumps by controlling the microstructure of Bi-Sn solder bumps. The contact resistances of Bi-Sn solder joints were 19 m$\Omega$ at $80{\mu}{\textrm}{m}$ pitch and 60 m$\Omega$ at $80{\mu}{\textrm}{m}$ pitch, respectively. These values are much lower than the contact resistance of the conventional ACF bonding. The contact resistances of the solder joint are almost the same before and after the underfill process. The contact resistance of the underfilled Bi-Sn solder joint did not change even after reliability test.

  • PDF

Maskless Screen Printing Process using Solder Bump Maker (SBM) for Low-cost, Fine-pitch Solder-on-Pad (SoP) Technology

  • Choi, Kwang-Seong;Lee, Haksun;Bae, Hyun-Cheol;Eom, Yong-Sung
    • Journal of the Microelectronics and Packaging Society
    • /
    • v.20 no.4
    • /
    • pp.65-68
    • /
    • 2013
  • A novel bumping process using solder bump maker (SBM) is developed for fine-pitch flip chip bonding. It features maskless screen printing process. A selective solder bumping mechanism without the mask is based on the material design of SBM. Maskless screen printing process can implement easily a fine-pitch, low-cost, and lead-free solder-on-pad (SoP) technology. Its another advantage is ternary or quaternary lead-free SoP can be formed easily. The process includes two main steps: one is the thermally activated aggregation of solder powder on the metal pads on a substrate and the other is the reflow of the deposited powder on the pads. Only a small quantity of solder powder adjacent to the pads can join the first step, so a quite uniform SoP array on the substrate can be easily obtained regardless of the pad configurations. Through this process, an SoP array on an organic substrate with a pitch of 130 ${\mu}m$ is, successfully, formed.

Collective laser-assisted bonding process for 3D TSV integration with NCP

  • Braganca, Wagno Alves Junior;Eom, Yong-Sung;Jang, Keon-Soo;Moon, Seok Hwan;Bae, Hyun-Cheol;Choi, Kwang-Seong
    • ETRI Journal
    • /
    • v.41 no.3
    • /
    • pp.396-407
    • /
    • 2019
  • Laser-assisted bonding (LAB) is an advanced technology in which a homogenized laser beam is selectively applied to a chip. Previous researches have demonstrated the feasibility of using a single-tier LAB process for 3D through-silicon via (TSV) integration with nonconductive paste (NCP), where each TSV die is bonded one at a time. A collective LAB process, where several TSV dies can be stacked simultaneously, is developed to improve the productivity while maintaining the reliability of the solder joints. A single-tier LAB process for 3D TSV integration with NCP is introduced for two different values of laser power, namely 100 W and 150 W. For the 100 W case, a maximum of three dies can be collectively stacked, whereas for the 150 W case, a total of six tiers can be simultaneously bonded. For the 100 W case, the intermetallic compound microstructure is a typical Cu-Sn phase system, whereas for the 150 W case, it is asymmetrical owing to a thermogradient across the solder joint. The collective LAB process can be realized through proper design of the bonding parameters such as laser power, time, and number of stacked dies.

A Study on the Characteristics and Error Ranges of Automotive Application Component's Mechanical Bonding Strength for the Its Reliability Evaluation (신뢰성 평가를 위한 자동차 전장 부품의 기계적 접합강도 특성 및 오차범위에 관한 연구)

  • Jeon, Yu-Jae;Kim, Do-Seok;Shin, Young-Eui
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
    • /
    • v.24 no.12
    • /
    • pp.949-954
    • /
    • 2011
  • In this study, the characteristics and error ranges of the mechanical bonding strength were analyzed according to before and after thermal shock test for various chips of automotive application component using Sn-3.0Ag-0.5Cu solder. In the after thermal shock test, the mechanical bonding strengths tend to decrease, meanwhile decreasing rates of mechanical strengths were less then 12% at specimen's bonding area below 3.5$mm^2$, and were from 17 to 21% at specimen's bonding area above 12 $mm^2$. On the other hand, Specimen's mean deviation rates were about 5% at specimen's bonding area more than 12 $mm^2$. Inversely, at specimen's bonding area is less then 3.5 $mm^2$, mean deviation rates were increased to about 8%. It means that the smaller device size is, the larger mean deviation rate. In addition, error ranges and deviation rates of the mechanical bonding strengths may differ slightly depending on their bonding area. Furthermore, process conditions as well as method of mechanical reliability evaluation should be established to reduce the error ranges of bonding strength.

Chip Interconnection Process for Smart Fabrics Using Flip-chip Bonding of SnBi Solder (SnBi 저온솔더의 플립칩 본딩을 이용한 스마트 의류용 칩 접속공정)

  • Choi, J.Y.;Park, D.H.;Oh, T.S.
    • Journal of the Microelectronics and Packaging Society
    • /
    • v.19 no.3
    • /
    • pp.71-76
    • /
    • 2012
  • A chip interconnection technology for smart fabrics was investigated by using flip-chip bonding of SnBi low-temperature solder. A fabric substrate with a Cu leadframe could be successfully fabricated with transferring a Cu leadframe from a carrier film to a fabric by hot-pressing at $130^{\circ}C$. A chip specimen with SnBi solder bumps was formed by screen printing of SnBi solder paste and was connected to the Cu leadframe of the fabric substrate by flip-chip bonding at $180^{\circ}C$ for 60 sec. The average contact resistance of the SnBi flip-chip joint of the smart fabric was measured as $9m{\Omega}$.