• Title/Summary/Keyword: Silicon thin film

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Effects of Neutral Particle Beam on Nano-Crystalline Silicon Thin Film Deposited by Using Neutral Beam Assisted Chemical Vapor Deposition at Room Temperature

  • Lee, Dong-Hyeok;Jang, Jin-Nyoung;So, Hyun-Wook;Yoo, Suk-Jae;Lee, Bon-Ju;Hong, Mun-Pyo
    • Proceedings of the Korean Vacuum Society Conference
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    • 2012.08a
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    • pp.254-255
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    • 2012
  • Interest in nano-crystalline silicon (nc-Si) thin films has been growing because of their favorable processing conditions for certain electronic devices. In particular, there has been an increase in the use of nc-Si thin films in photovoltaics for large solar cell panels and in thin film transistors for large flat panel displays. One of the most important material properties for these device applications is the macroscopic charge-carrier mobility. Hydrogenated amorphous silicon (a-Si:H) or nc-Si is a basic material in thin film transistors (TFTs). However, a-Si:H based devices have low carrier mobility and bias instability due to their metastable properties. The large number of trap sites and incomplete hydrogen passivation of a-Si:H film produce limited carrier transport. The basic electrical properties, including the carrier mobility and stability, of nc-Si TFTs might be superior to those of a-Si:H thin film. However, typical nc-Si thin films tend to have mobilities similar to a-Si films, although changes in the processing conditions can enhance the mobility. In polycrystalline silicon (poly-Si) thin films, the performance of the devices is strongly influenced by the boundaries between neighboring crystalline grains. These grain boundaries limit the conductance of macroscopic regions comprised of multiple grains. In much of the work on poly-Si thin films, it was shown that the performance of TFTs was largely determined by the number and location of the grain boundaries within the channel. Hence, efforts were made to reduce the total number of grain boundaries by increasing the average grain size. However, even a small number of grain boundaries can significantly reduce the macroscopic charge carrier mobility. The nano-crystalline or polymorphous-Si development for TFT and solar cells have been employed to compensate for disadvantage inherent to a-Si and micro-crystalline silicon (${\mu}$-Si). Recently, a novel process for deposition of nano-crystralline silicon (nc-Si) thin films at room temperature was developed using neutral beam assisted chemical vapor deposition (NBaCVD) with a neutral particle beam (NPB) source, which controls the energy of incident neutral particles in the range of 1~300 eV in order to enhance the atomic activation and crystalline of thin films at room temperature. In previous our experiments, we verified favorable properties of nc-Si thin films for certain electronic devices. During the formation of the nc-Si thin films by the NBaCVD with various process conditions, NPB energy directly controlled by the reflector bias and effectively increased crystal fraction (~80%) by uniformly distributed nc grains with 3~10 nm size. The more resent work on nc-Si thin film transistors (TFT) was done. We identified the performance of nc-Si TFT active channeal layers. The dependence of the performance of nc-Si TFT on the primary process parameters is explored. Raman, FT-IR and transmission electron microscope (TEM) were used to study the microstructures and the crystalline volume fraction of nc-Si films. The electric properties were investigated on Cr/SiO2/nc-Si metal-oxide-semiconductor (MOS) capacitors.

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Performance Improvement of Flexible Thin Film Si Solar Cells using Graphite Substrate (그라파이트 기판을 이용한 유연 박막 실리콘 태양전지 특성 향상)

  • Lim, Gyeong-yeol;Cho, Jun-sik;Chang, Hyo Sik
    • Korean Journal of Materials Research
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    • v.29 no.5
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    • pp.317-321
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    • 2019
  • We investigated the characteristics of nano crystalline silicon(nc-Si) thin-film solar cells on graphite substrates. Amorphous silicon(a-Si) thin-film solar cells on graphite plates show low conversion efficiency due to high surface roughness, and many recombination by dangling bonds. In previous studies, we deposited barrier films by plasma enhanced chemical vapor deposition(PECVD) on graphite plate to reduce surface roughness and achieved ~7.8 % cell efficiency. In this study, we fabricated nc-Si thin film solar cell on graphite in order to increase the efficiency of solar cells. We achieved 8.45 % efficiency on graphite plate and applied this to nc-Si on graphite sheet for flexible solar cell applications. The characterization of the cell is performed with external quantum efficiency(EQE) and current density-voltage measurements(J-V). As a result, we obtain ~8.42 % cell efficiency in a flexible solar cell fabricated on a graphite sheet, which performance is similar to that of cells fabricated on graphite plates.

Interface Passivation Properties of Crystalline Silicon Wafer Using Hydrogenated Amorphous Silicon Thin Film by Hot-Wire CVD (열선 CVD법으로 증착된 비정질 실리콘 박막과 결정질 실리콘 기판 계면의 passivation 특성 분석)

  • Kim, Chan-Seok;Jeong, Dae-Young;Song, Jun-Yong;Park, Sang-Hyun;Cho, Jun-Sik;Yoon, Kyoung-Hoon;Song, Jin-Soo;Kim, Dong-Hwan;Yi, Jun-Sin;Lee, Jeong-Chul
    • 한국신재생에너지학회:학술대회논문집
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    • 2009.06a
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    • pp.172-175
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    • 2009
  • n-type crystalline silicon wafers were passivated with intrinsic a-Si:H thin films on both sides using HWCVD. Minority carrier lifetime measurement was used to verify interface passivation properties between a-Si:H thin film and crystalline Si wafer. Thin film interface characteristics were investigated depending on $H_2/SiH_4$ ratio and hot wire deposition temperature. Vacuum annealing were processed after deposition a-Si:H thin films on both sides to investigate thermal effects from post process steps. We noticed the effect of interface passivation properties according to $H_2/SiH_4$ ratio and hot wire deposition temperature, and we had maximum point of minority carrier lifetime at H2/SiH4 10 ratio and $1600^{\circ}C$ wire temperature.

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Simultaneous Detection Properties of Organic Vapor, Pressure Difference and Magnetic Field using a Rugate-structured Free-standing Porous Silicon Film (Rugate 구조를 갖는 자립형 다공성 실리콘 박막을 이용한 유기 증기, 압력차, 자기장의 동시 감응 특성)

  • Han, Seong-Beom;Lee, Ki Won
    • Journal of Sensor Science and Technology
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    • v.26 no.3
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    • pp.186-191
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    • 2017
  • In this study, we investigated the simultaneous detection properties of organic vapor, pressure difference, and magnetic field using a single rugate-structured free-standing porous silicon (RFPS) thin film. Both the wavelength and the intensity of the rugate peaks were changed in the reflectivity spectrum measured at the thin film surface while the organic vapor was exposed to the RFPS thin film. However, when the pressure difference and the magnetic field were exposed to the film, only the rugate peak intensity was changed. Therefore, it is possible to distinguish whether or not the organic vapor is detected by simultaneously changing the rugate peak wavelength and intensity. In addition, a method of distinguishing between the pressure difference and the magnetic field detection signal has been derived by rapidly modulating the direction of the magnetic field. This study shows that it is possible to simultaneously detect and distinguish various objects using a single RFPS thin film, and it is found that porous silicon can be utilized as a sensor sufficiently.

The Influence of Silicon Doping on Electrical Characteristics of Solution Processed Silicon Zinc Tin Oxide Thin Film Transistor

  • Lee, Sang Yeol;Choi, Jun Young
    • Transactions on Electrical and Electronic Materials
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    • v.16 no.2
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    • pp.103-105
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    • 2015
  • Effect of silicon doping into ZnSnO systems was investigated using solution process. Addition of silicon was used to suppress oxygen vacancy generation. The transfer characteristics of the device showed threshold voltage shift toward the positive direction with increasing Si content due to the high binding energy of silicon atoms with oxygen. As a result, the carrier concentration was decreased with increasing Si content.

Non Leaky Conductor-Backed CPW Based on Thin Film Polyimide on CMOS-grade Silicon for Ku-band Application

  • Lee, Sang-No;Lee, Joon-Ik;Yook, Jong-Gwan;Kim, Yong-Jun
    • KIEE International Transactions on Electrophysics and Applications
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    • v.4C no.4
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    • pp.165-169
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    • 2004
  • This paper reports a miniaturized conductor-backed CPW (CBCPW) bandpass filter based on a thin film polyimide layer coated on CMOS-grade silicon. With a 20 ${\mu}{\textrm}{m}$-thick polyimide interface layer and back metallization on the CMOS-grade silicon, the interaction of electromagnetic fields with the lossy silicon substrate has been isolated, and as a result a low-loss and low-dispersive CBCPW line has been obtained. Measured attenuation constant at 20 GHz is below 1.2 ㏈/cm, which is compatible with the CPW on GaAs. In addition, by using the proposed CBCPW geometry, miniaturized BPF for Ku band application is designed and its measured frequency response shows excellent agreement with the predicted value with validating the performances of the proposed CBCPW geometry for RFIC interconnects and filter applications.

Structural Effect on Backlight Induced-leakage Current in Amorphous Silicon Thin Film Transistor

  • Kim, Sho-Yeon;Kim, Tae-Hyun;Jeon, Jae-Hong;Choe, Hee-Hwan;Lee, Kang-Woong;Seo, Jong-Hyun
    • 한국정보디스플레이학회:학술대회논문집
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    • 2007.08b
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    • pp.1308-1311
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    • 2007
  • Leakage current produced by backside illumination on bottom-gated amorphous silicon thin film transistor has been investigated. The experimental results show that the leakage current of bottomgated structure is significantly dependent on the shape of amorphous silicon pattern. A proper design of amorphous silicon pattern has been suggested in viewpoint of reducing the leakage current as well as mass production.

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Development of Real Time Thickness Measurement System of Thin Film for 12" Wafer Spin Etcher (12" 웨이퍼 Spin etcher용 실시간 박막두께 측정장치의 개발)

  • 김노유;서학석
    • Journal of the Semiconductor & Display Technology
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    • v.2 no.2
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    • pp.9-15
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    • 2003
  • This paper proposes a thickness measurement method of silicon-oxide and poly-silicon film deposited on 12" silicon wafer for spin etcher. Halogen lamp is used as a light source for generating a wide-band spectrum, which is guided and focused on the wafer surface through a optical fiber cable. Interference signal from the film is detected by optical sensor to determine the thickness of the film using spectrum analysis and several signal processing techniques including curve-fitting and adaptive filtering. Test wafers with three kinds of priori-known films, polysilicon(300 nm), silicon-oxide(500 nm) and silicon-oxide(600 nm), are measured while the wafer is spinning at 20 Hz and DI water flowing on the wafer surface. From experiment results the algorithm presented in the paper is proved to be effective with accuracy of maximum 0.8% error.rror.

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Direct-Aluminum-Heating-Induced Crystallization of Amorphous Silicon Thin Film (비정질 실리콘 박막의 알루미늄 직접 가열 유도 결정화 공정)

  • Park, Ji-Young;Lee, Dae-Geon;Moon, Seung-Jae
    • Transactions of the Korean Society of Mechanical Engineers B
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    • v.36 no.10
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    • pp.1019-1023
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    • 2012
  • In this research, a novel direct-aluminum-heating-induced crystallization method was developed for the purpose of application to solar cells. By applying a constant current of 3 A to an aluminum thin film, a 200-nm-thick amorphous silicon (a-Si) thin film with a size of $1cm{\times}1cm$ can be crystallized into a polycrystalline silicon (poly-Si) thin film within a few tens of seconds. The Raman spectrum analysis shows a peak of 520 $cm^{-1}$, which verifies the presence of poly-Si. After removing the aluminum layer, the poly-Si thin film was found to be porous. SIMS analysis showed that the porous poly-Si thin film was heavily p-doped with a doping concentration of $10^{21}cm^{-3}$. Thermal imaging shows that the crystallization from a-Si to poly-Si occurred at a temperature of around 820 K.

Silicon Thin-film Transistors on Flexible Foil Substrates

  • Wagner, Sigurd;Gleskova, Helena
    • 한국정보디스플레이학회:학술대회논문집
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    • 2002.08a
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    • pp.263-267
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    • 2002
  • We are standing at the beginning of the industrialization of flexible thin-film transistor backplanes. An important group of candidates is based on silicon thin films made on metal or plastic foils. The main features of amorphous, nanocrystalline and microcrystalline silicon films for TFTs are summarized, and their compatibility with foil substrate materials is discussed.

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