• Journal of Sensor Science and Technology
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• v.24 no.4
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• pp.239-246
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• 2015

Blood pressure is possible to diagnose a disease associated with blood pressure and judgment the current health of patients. Automatic blood pressure monitor capable of measuring a blood pressure easily in hospital and at home have become spread. In this study, we developed the blood pressure simulator (BPS) that can test the arm-type automatic blood pressure monitor that is commonly used in hospital. BPS is to produce a pressure similar to the pressure wave generated in the human blood using a servo disk motor. Then, using the silicon tube, it implements the situations such as human blood vessels, and to output the generated pressure waveform. Simply the BPS's phantom put on the cuff and it is able to simulate blood pressure. So anyone can quickly test the blood pressure monitor within one minute and it is possible to shorten the test time required for the automatic blood pressure monitor. In Performance test, the trends and the standard deviation of the values measured in the BPS is similar to the value of the measured pressure from people with normal blood pressure. Thus, the development BPS showed a possibility of taking into account the actual blood pressure measurement environment simulator.

• Journal of Sensor Science and Technology
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• v.20 no.3
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• pp.156-161
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• 2011

We fabricated a schottky barrier metal oxide semiconductor field effect transistor(SB-MOSFET) by applying indium-tin-oxide(ITO) to the source/drain on a highly resistive GaN layer grown on a silicon substrate. The MOSFET, with 10 ${\mu}M$ gate length and 100 ${\mu}M$ gate width, exhibits a threshold gate voltage of 2.7 V, and has a sub-threshold slope of 240 mV/dec taken from the $I_{DS}-V_{GS}$ characteristics at a low drain voltage of 0.05 V. The maximum drain current is 18 mA/mm and the maximum transconductance is 6 mS/mm at $V_{DS}$=3 V. We observed that the spectral photo-response characterization exhibits that the cutoff wavelength was 365 nm, and the UV/visible rejection ratio was about 130 at $V_{DS}$ = 5 V. The MOSFET-type UV detector using ITO, has a high UV photo-responsivity and so is highly applicable to the UV image sensors.

• Journal of Sensor Science and Technology
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• v.29 no.4
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• pp.255-260
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• 2020

In this study, we developed a method of improving the surface-enhanced Raman spectroscopy (SERS) response characteristics by depositing a nanoporous Ag metal thin film through cluster source sputtering after forming a pyramidal texture structure on the Si substrate surface. A reactive ion etching (RIE) system with a metal mesh inside the system was used to form a pyramidal texture structure on the Si surface without following a complicated photolithography process, unlike in case of the conventional RIE system. The size of the texture structure increased with the RIE process time. However, after a process time of 60 min, the size of the structure did not increase but tended to saturate. When the RF power increased from 200 to 250 W, the size of the pyramidal texture structure increased from 0.45 to 0.8 ㎛. The SERS response characteristics were measured by depositing approximately 1.5 ㎛ of nanoporous Ag metal thin film through cluster sputtering on the formed texture structure by varying the RIE process conditions. The Raman signal strength of the nanoporous Ag metal thin film deposited on the Si substrate with the texture structure was higher than that deposited on the general silicon substrate by up to 19%. The Raman response characteristics were influenced by the pyramid size and the number of pyramids per unit area but appeared to be influenced more by the number of pyramids per unit area. Therefore, further studies are required in this regard.

• Proceedings of the KIEE Conference
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• 2002.07c
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• pp.2003-2005
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• 2002

바이오 마이크로 시스템 및 바이오 MEMS 분야, 특히 실리콘을 기질로 하는 바이오 센서 제작에서 반도체 공정 기술은 센서의 대량 생산과 초소형화를 위해서 반드시 필요한 기술이다. 그러나, 감지전극의 마이크로화에 따른 센서의 감도 및 안정성 저하 문제는 해결해야 할 과제이다. 최근, 다공질 실리콘이 갖는 대면적이 실리콘 기질과 생체 고분자 (예: 단백질, 핵산 등) 간의 결합력을 향상시킬 수 있음이 알려지면서, 바이오 센서 분야에서, 새로운 형태의 드랜스듀서 재료로서의 다공질 실리콘에 대한 논의가 활발히 전개되고 있으며 또한, ISFET (Ion-Selective Field-Effect Transistors) 와는 달리 다공질 실리콘 층은 저항이 크기 때문에 센서 제작 과정에서의 부가적인 절연막을 필요로 하지 않는다. 본 연구에서는, 백금을 증착한 다공질 실리콘 표면에 전도성 고분자로서 Polypyrrole (PPy) 필름과 생체 고분자 물질로서 Urease를 각각 전기화학적으로 흡착하였다. 다공질 실리콘 층의 형성을 위해 테플론 소재의 전기화학 전지에 불산 (49%), 에탄올 (95%), $H_2O$ 혼합 용액을 넣고 실리콘 웨이퍼에 일정시간 수 mA의 산화 전류를 흘려주었으며, 약 $200{\AA}$의 티타늄 박막과 $200{\AA}$의 백금 박막을 RF 스퍼터링하여 작업 전극을 제작하였고, 백금 박막 및 Ag를 기화 증착하여 제작한 Ag/AgCl 박막을 각각 상대 전극과 기준전극으로 하였다. 박막 전극의 표면 분석을 위해 SEM (Scanning Electron Microscopy), EDX (Energy Dispersive X-ray spectroscopy) 등을 이용하였다. 제작된 요소 센서로부터 요소 농도 범위 0.01 mmol/L ${\sim}$ 100 mmol/L에서 약 0.2 mA/decade의 감도를 얻었다.

• Journal of Astronomy and Space Sciences
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• v.35 no.3
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• pp.195-200
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• 2018

The present paper describes the design of a Solid State Telescope (SST) on board the Korea Astronomy and Space Science Institute satellite-1 (KASISat-1) consisting of four [TBD] nanosatellites. The SST will measure these radiation belt electrons from a low-Earth polar orbit satellite to study mechanisms related to the spatial resolution of electron precipitation, such as electron microbursts, and those related to the measurement of energy dispersion with a high temporal resolution in the sub-auroral regions. We performed a simulation to determine the sensor design of the SST using GEometry ANd Tracking 4 (GEANT4) simulations and the Bethe formula. The simulation was performed in the range of 100 ~ 400 keV considering that the electron, which is to be detected in the space environment. The SST is based on a silicon barrier detector and consists of two telescopes mounted on a satellite to observe the electrons moving along the geomagnetic field (pitch angle $0^{\circ}$) and the quasi-trapped electrons (pitch angle $90^{\circ}$) during observations. We determined the telescope design of the SST in view of previous measurements and the geometrical factor in the cylindrical geometry of Sullivan (1971). With a high spectral resolution of 16 channels over the 100 keV ~ 400 keV energy range, together with the pitch angle information, the designed SST will answer questions regarding the occurrence of microbursts and the interaction with energetic particles. The KASISat-1 is expected to be launched in the latter half of 2020.

• Journal of Sensor Science and Technology
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• v.16 no.5
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• pp.325-330
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• 2007

For the application to optic devices, wafer level package including spacer with particular thickness according to optical design could be required. In these cases, the uniformity of spacer thickness is important for bonding strength and optical performance. Packaging process has to be performed at low temperature in order to prevent damage to devices fabricated before packaging. And if photosensitive material is used as spacer layer, size and shape of pattern and thickness of spacer can be easily controlled. This paper presents polymer bonding using thick, uniform and patterned spacing layer of SU-8 2100 photoresist for wafer level package. SU-8, negative photoresist, can be coated uniformly by spin coater and it is cured at $95^{\circ}C$ and bonded well near the temperature. It can be bonded to silicon well, patterned with high aspect ratio and easy to form thick layer due to its high viscosity. It is also mechanically strong, chemically resistive and thermally stable. But adhesion of SU-8 to glass is poor, and in the case of forming thick layer, SU-8 layer leans from the perpendicular due to imbalance to gravity. To solve leaning problem, the wafer rotating system was introduced. Imbalance to gravity of thick layer was cancelled out through rotating wafer during curing time. And depositing additional layer of gold onto glass could improve adhesion strength of SU-8 to glass. Conclusively, we established the coating condition for forming patterned SU-8 layer with $400{\mu}m$ of thickness and 3.25 % of uniformity through single coating. Also we improved tensile strength from hundreds kPa to maximum 9.43 MPa through depositing gold layer onto glass substrate.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2002.10a
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• pp.1033-1036
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• 2002

Wafer bonding methods such as fusion and anodic bonding suffer from high temperature treatment, long processing time, and possible damage to the micro-scale sensor or actuators. In the localized bonding process, beating was conducted locally while the whole wafer is maintained at a relatively low temperature. But previous research of localized heating has some problems, such as non-uniform soldering due to non-uniform heating and micro crack formation on the glass capsule by thermal stress effect. To address this non-uniformity problem, a new heater configuration is being proposed. By keeping several points on the heater strip at calculated and constant potential, more uniform heating, hence more reliable wafer bonding could be achieved. The proposed scheme has been successfully demonstrated, and the result shows that it will be very useful in hermetic packaging. Less than 0.2 ㎫ contact Pressure were used for bonding with 150 ㎃ current input for 50${\mu}{\textrm}{m}$ width, 2${\mu}{\textrm}{m}$ height and 8mm $\times$ 8mm, 5mm$\times$5mm, 3mm $\times$ 3mm sized phosphorus-doped poly-silicon micro heater. The temperature can be raised at the bonding region to 80$0^{\circ}C$, and it was enough to achieve a strong and reliable bonding in 3minutes. The IR camera test results show improved uniformity in heat distribution compared with conventional micro heaters. For gross leak check, IPA (Isopropanol Alcohol) was used. Since IPA has better wetability than water, it can easily penetrate small openings, and is more suitable for gross leak check. The pass ratio of bonded dies was 70%, for conventional localized heating, and 85% for newly developed FP scheme. The bonding strength was more than 30㎫ for FP scheme packaging, which shows that FP scheme can be a good candidate for micro scale hermetic packaging.

• Proceedings of the Korean Vacuum Society Conference
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• 2011.02a
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• pp.480-480
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• 2011

양극산화(anodization)는 금속을 전기화학적으로 산화시켜 금속산화물로 만드는 기술로서 최근 다양한 크기의 나노 구조를 제조하는 기술로 각광받고 있으며, 이러한 기술에 의하여 얻어지는 anodic aluminum oxide(AAO)는 magnetic data storage, optoelectronic device, sensor에 적용될 수 있는 nano device 뿐만 아니라 nanostructure를 제조하기 위한 template 및 mask로써 최근 광범위 하게 연구되고 있다. 또한, AAO는 Al2O3의 단단한 구조를 가진 무기재료이므로 solid mask로써 다른 porous materials 보다 뛰어난 특성을 갖고 있다. 또한 electron-beam lithography 및 block co-polymer 에 의한 patterning 과 비교하여 매우 경제적이며, 재현성이 우수할 뿐만 아니라 대면적에서 나노 구조의 크기 및 형상제어가 비교적 쉽기 때문에 널리 사용되고 있다. 그러나, AAO 형성 시 생기게 되는 반구형 모양의 barrier layer는 물질(substance)과 기판과의 direct physical and electrical contact을 방해하기 때문에 해결해야 할 가장 큰 문제점 중 하나로 알려져 있다. 따라서 본 연구에서는 실리콘 기판위의 형성된 AAO의 barrier layer를 Cl/BCl3 gas mixture에서 Neutral Beam Etching (NBE)과 Ion Beam Etching (IBE) 로 각각 식각한 후 그 결과와 비교하였다. NBE와 IBE 모두 Cl2/BCl3 gas mixture에서 BCl3 gas의 첨가량이 60% 일 경우 etch rate이 가장 높게 나타났고, optical emission spectroscopy (OES)로 Cl2/BCl3 플라즈마 내의 Cl radical density와 X-ray photoelectron spectroscopy (XPS)로 AAO 표면 위를 관찰한 결과 휘발성 BOxCly의 형성이 AAO 식각에 크게 관여함을 확인 할 수 있었다. 또한, NBE와 IBE 실험한 다양한 Cl2/BCl3 gas mixture ratio 에서 AAO가 식각이 되지만, 이온빔의 경우 나노사이즈의 AAO pore의 charging에 의해 pore 아래쪽의 위치한 barrier layer를 어떤 식각조건에서도 제거하지 못하였다. 하지만, NBE에서는 BCl3-rich Cl2/BCl3 gas mixture인 식각조건에서 AAO pore에 휘발성 BOxCly를 형성하면서 barrier layer를 제거할 수 있었다.

• Journal of Sensor Science and Technology
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• v.15 no.1
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• pp.58-64
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• 2006

In this study, we describe a low-temperature wafer-level thermocompression bonding using electroplated gold seal line and bonding pads by electroplating method for RF-MEMS devices. Silicon wafers, electroplated with gold (Au), were completely bonded at $320^{\circ}C$ for 30 min at a pressure of 2.5 MPa. The through-hole interconnection between the packaged devices and external terminal did not need metal filling process and was made by gold films deposited on the sidewall of the throughhole. This process was low-cost and short in duration. Helium leak rate, which is measured to evaluate the reliability of bonded wafers, was $2.7{\pm}0.614{\times}10^{-10}Pam^{3}/s$. The insertion loss of the CPW packaged was $-0.069{\sim}-0.085\;dB$. The difference of the insertion loss between the unpackaged and packaged CPW was less than -0.03. These values show very good RF characteristics of the packaging. Therefore, gold thermocompression bonding can be applied to high quality hermetic wafer level packaging of RF-MEMS devices.

• Journal of Sensor Science and Technology
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• v.22 no.2
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• pp.130-135
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• 2013

This study proposed a noble process to fabricate TSV (Through Silicon Via) structure which has lower cost, shorter production time, and more simple fabrication process than plating method. In order to produce the via holes, the Si wafer was etched by a DRIE (Deep Reactive Ion Etching) process. The via hole was $100{\mu}m$ in diameter and $400{\mu}m$ in depth. A dielectric layer of $SiO_2$ was formed by thermal oxidation on the front side wafer and via hole side wall. An adhesion layer of Ti and a seed layer of Au were deposited. Soldering process was applied to fill the via holes with solder paste and metal powder. When the solder paste was used as via hole metal line, sintering state and electrical properties were excellent. However, electrical connection was poor due to occurrence of many voids. In the case of metal powder, voids were reduced but sintering state and electrical properties were bad. We tried the via hole filling process by using mixing solder paste and metal powder. As a consequence, it was confirmed that mixing rate of solder paste (4) : metal powder (3) was excellent electrical characteristics.