• Proceedings of the Korean Institute of Navigation and Port Research Conference
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• 2000.11a
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• pp.29-32
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• 2000

Cerium oxide thin film has been proposed as a buffer layer between the ferroelectric film and the Si substrate in Metal-Ferroelectric-Insulator-Silicon (MFIS ) structures for ferroelectric random access memory (FRAM) applications. In this study, CeO$_2$thin films were etched with Cl$_2$/Ar gas combination in an inductively coupled plasma (ICP). The highest etch rate of CeO$_2$film is 230 $\AA$/min at Cl$_2$/(Cl$_2$+Ar) gas mixing ratio of 0.2. This result confirms that CeO$_2$thin film is dominantly etched by Ar ions bombardment and is assisted by chemical reaction of Cl radicals. The selectivity of CeO$_2$to YMnO$_3$was 1.83. As a XPS analysis, the surface of etched CeO$_2$thin films was existed in Ce-Cl bond by chemical reaction between Ce and Cl. The results of XPS analysis were confirmed by SIMS analysis. The existence of Ce-Cl bonding was proven at 176.15 (a.m.u.).

• Journal of the Korean Society for Precision Engineering
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• v.31 no.10
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• pp.865-871
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• 2014

Paradigm shift to 3-D chip stacking in electronic packaging has induced a lot of integration challenges due to the reduction in wafer thickness and pitch size. This study presents a hybrid bonding technology by self-alignment effect in order to improve the flip chip bonding accuracy with ultra-thin wafer. Optimization of Cu pillar bump formation and evaluation of various factors on self-alignment effect was performed. As a result, highly-improved bonding accuracy of thin wafer with a $50{\mu}m$ of thickness was achieved without solder bridging or bump misalignment by applying reflow process after thermo-compression bonding process. Reflow process caused the inherently-misaligned micro-bump to be aligned due to the interface tension between Si die and solder bump. Control of solder bump volume with respect to the chip dimension was the critical factor for self-alignment effect. This study indicated that bump design for 3D packaging could be tuned for the improvement of micro-bonding quality.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.25 no.5
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• pp.366-371
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• 2012

In this paper, fabricated by MEMS uncooled micro-bolometer detector for the study in the infrared sensitivity enhancement. Absorption layer SiOx-Metal series MDTF (metal-dielectric thin film) by high absorption rate and has a high thermal coefficient of resistance, low noise characteristics were implemented. Then MDTF were made in a vacuum deposition method. And MDTF for the analysis of the physical properties of silicon wafers were fabricated, TCR (temperature coefficient of resistance) value was made in order to measure the glass wafer and FT-IR (Fourier Transform Infrared spectroscopy) values were made in order to measure the germanium window. The analyzed results of MDTF -3 [%/K] has more characteristics of the TCR. And 8~12 um wavelength region close to 70% in the absorption characteristic.

• Journal of Electrical Engineering and Technology
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• v.13 no.6
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• pp.2434-2440
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• 2018

A new type of piezoelectric micromachined ultrasonic transducer (pMUT) with high resonant frequency was developed by using a thin lead zirconate titanate (PZT) as an insulation layer on a floating $10{\mu}m$ silicon membrane. The PZT insulation layer facilitated acoustic impedance matching at active pMUT, leading to a high performance in the acoustic conversion property compared with the transducer using $SiO_2$ insulation layer. The fabricated ultrasonic devices were wirelessly measured by connecting two identical acoustic transducers to two separate ports in a single network analyzer simultaneously. The acoustic wave emitted from a transducer induced a $3.16{\mu}W$ on the other side of the transducer at a distance of 2 cm. The transducer performances in terms of device diameters, PZT thickness, annealings, and different DC polings, etc. were investigated. COMSOL simulation was also performed to predict the device performances prior to fabrication. Based on the COMSOL simulation, the device was fabricated and the results were compared.

• Journal of Sensor Science and Technology
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• v.23 no.5
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• pp.326-331
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• 2014

In this study, a MEMS microphone that uses $Si_3N_4$ as the vibration membrane was produced for application as an auditory device using a sound visualization technique (sound visualization) for the hearing impaired. Two sheets of 6-inch silicon wafer were each fabricated into a vibration membrane and back plate, after which, wafer bonding was performed. A certain amount of charge was created between the bonded vibration membrane and the back plate electrodes, and a MEMS microphone that functioned through the capacitive method that uses change in such charge was fabricated. In order to evaluate the characteristics of the prepared MEMS microphone, the frequency flatness, frequency response, properties of phase between samples, and directivity according to the direction of sound source were analyzed. The MEMS microphone showed excellent flatness per frequency in the audio frequency (100 Hz-10 kHz) and a high response of at least -42 dB (sound pressure level). Further, a stable differential phase between the samples of within -3 dB was observed between 100 Hz-6 kHz. In particular, excellent omnidirectional properties were demonstrated in the frequency range of 125 Hz-4 kHz.

• Proceedings of the Korean Vacuum Society Conference
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• 2013.02a
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• pp.290-290
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• 2013

플라즈마 전해산화(Plasma Electrolytic Oxidation)란 저 농도의 알칼리 전해액을 매개로, 고전압을 가해 미세 플라즈마 방전을 유도하여 Al, Mg, Ti 등의 금속표면을 산화시켜 고내식성, 초경합금 수준의 내마모성, 탁월한 절연성과 고경도성을 가지는 산화막을 형성시키는 기술로 전자, 자동차, 의료, 섬유, 해양, 석유화학 산업에 이르기까지 광범위한 분야에 적용되어 우수한 물성을 확보할 수 있는 차세대의 표면처리 기술이다. 본 연구에서는 6061 알루미늄 합금을 이용하여 다양한 전해액 조건에서 플라즈마 전해산화 공정으로 Al2O3 산화막을 형성시켰다. 산화막의 조성 및 미세구조는 XRD와 FE-SEM, EDS를 이용하여 분석하였다. 형성된 산화막은 회색에서 밝은 회색으로 시편 전면에 고르게 나타났다. 전해액 조성을 바꾸어줌에 따라 각기 다른 표면 특성을 가지는 산화막을 얻을 수 있었고, 그에 따른 물성 변화를 분석하였다. 특히 Si 이온 농도를 조절함으로써 피막 성장인자와 표면 미세구조를 제어할 수 있었다.

• Advances in nano research
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• v.9 no.2
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• pp.105-112
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• 2020

Silicene is a two-dimensional (2D) derivative of silicon (Si) arranged in honeycomb lattice. It is predicted to be compatible with the present fabrication technology. However, its gapless properties (neglecting the spin-orbiting effect) hinders its application as digital switching devices. Thus, a suitable band gap engineering technique is required. In the present work, the band structure and density of states of uniformly doped silicene are obtained using the nearest neighbour tight-binding (NNTB) model. The results show that uniform substitutional doping using aluminium (Al) has successfully induced band gap in silicene. The band structures of the presented model are in good agreement with published results in terms of the valence band and conduction band. The band gap values extracted from the presented models are 0.39 eV and 0.78 eV for uniformly doped silicene with Al at the doping concentration of 12.5% and 25% respectively. The results show that the engineered band gap values are within the range for electronic switching applications. The conclusions of this study envisage that the uniformly doped silicene with Al can be further explored and applied in the future nanoelectronic devices.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.5 no.1
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• pp.157-165
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• 2001

We analyzed the electrical characteristics of platinum silicide schottky junction to develope the voltage swing in Integrated Schottky Logic gates, and simulated the characteristics with the programs in this junctions. Simulation programs for analytic characteristics are the Medichi tool for device structure, Matlab for modeling and SUPREM V for fabrication process. The silicide junctions consist of PtSi and variable silicon substrate concentrations in ISL gates. Input parameters for simulation characteristics were the same conditions as process steps of the device farications process. The analitic electrical characteristics were the turn-on voltage, saturation current, ideality factor in forward bias, and has shown the results of breakdown voltage between actual characteristics and simulation characteristics in reverse bias. As a result, the forward turn-on voltage, reverse breakdown voltage, barrier height were decreased but saturation current and ideality factor were increased by substrates increased concentration variations.

• 한국정보디스플레이학회:학술대회논문집
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• 2007.08b
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• pp.1284-1287
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• 2007

Titanium dioxide ($TiO_2$) is promising candidate for fabricating blocking layer of gate dielectrics in non-volatile memory (NVM). In this work, we investigated $TiO_2$ as high dielectric constant material instead of silicon dioxide ($SiO_2$), which is generally used as blocking layer for NVM.

• Progress in Superconductivity
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• v.12 no.2
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• pp.114-117
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• 2011

We report our efforts on the development of Nb-based non-hysteretic Josephson junction fabrication process for quantu device applications. By adopting and modifying the existing Nb-aluminum oxide tunnel junction process, we develop a process for non-hysteretic Josephson junction circuits using metal-silicide as metallic barrier material. We use sputter deposition of Nb and $MoSi_2$, PECVD deposition of silicon oxide as insulator material, and ICP-RIE for metal and oxide etch. The advantage of the metal-silicide barrier in the Nb junction process is that it can be etched in $SF_6$ RIE together with Nb electrode. In order to define a junction area precisely and uniformly, end-point detection for the RIE process is critical. In this paper, we employed thin Al layer for the etch stop, and optimized the etch condition. We have successfully demonstrated that the etch stop properties of the inserted Al layer give a uniform etch profile and a precise thickness control of the base electrode in Nb trilayer junctions.