• 산업기술연구
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• 제28권B호
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• pp.209-214
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• 2008

Set-valued attributes appear in many applications to model complex objects occurring in the real world. One of the most important operations on set-valued attributes is the set join, because it provides a various method to express complex queries. Currently proposed set join algorithms are based on block nested loop join in which inverted files are partitioned horizontally into blocks. Evaluating these joins are expensive because they generate intermediate partial results severely and finally obtain the final results after merging partial results. In this paper, we present an efficient processing of set join algorithm. We propose a new set join algorithm that vertically partitions inverted files into blocks, where each block fits in memory, and performs block nested loop join without producing intermediate results. Our experiments show that the vertical bitmap nested set join algorithm outperforms previously proposed set join algorithms.

• 한국컴퓨터정보학회논문지
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• 제16권6호
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• pp.71-77
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• 2011

본 논문에서는 번호판 인식 시스템에서 번호판 영상의 화질 개선을 위하여 국부 블록(Local block : LB) 학습기반의 초해상도 알고리즘을 제안한다. 본 논문에서 국부 블록은 영상 내에서 정보를 담고 있는 최소 단위로 정의하였으며, 학습의 기본 단위가 된다. 제안된 방법은 먼저 다양한 환경에 적합한 훈련 국부 블록 set을 생성하였다. 훈련 국부 블록 set은 고해상도 국부 블록과 저해상도 국부 블록의 순서쌍으로 구성되며 다양한 크기의 번호판과 열화 영상에 대응하기 위하여 다양한 크기와 열화를 갖는 저해상도 국부 블록 훈련 set을 구성하였다. 그 다음으로는 저해상도 입력 영상에서 복원해야할 정보를 훈련 국부 블록 set에서 추출/융합하는 과정을 제안하였다. 모의 실험결과, 열화된 저해상도 번호판 영상에 대해 제안한 방법이 효과적인 복원 성능을 나타내는 것을 확인할 수 있었다.

• 대한조선학회논문집
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• 제57권3호
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• pp.140-151
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• 2020

It is important to identify the location of ship hull blocks with exact block identification number when scheduling the shipbuilding process. The wrong information on the location and identification number of some hull block can cause low productivity by spending time to find where the exact hull block is. In order to solve this problem, it is necessary to equip the system to track the location of the blocks and to identify the identification numbers of the blocks automatically. There were a lot of researches of location tracking system for the hull blocks on the stockyard. However there has been no research to identify the hull blocks on the stockyard. This study compares the performance of 5 Convolutional Neural Network (CNN) models with multi-view image set on the classification of the hull blocks to identify the blocks on the stockyard. The CNN models are open algorithms of ImageNet Large-Scale Visual Recognition Competition (ILSVRC). Four scaled hull block models are used to acquire the images of ship hull blocks. Learning and transfer learning of the CNN models with original training data and augmented data of the original training data were done. 20 tests and predictions in consideration of five CNN models and four cases of training conditions are performed. In order to compare the classification performance of the CNN models, accuracy and average F1-Score from confusion matrix are adopted as the performance measures. As a result of the comparison, Resnet-152v2 model shows the highest accuracy and average F1-Score with full block prediction image set and with cropped block prediction image set.

• Journal of applied mathematics & informatics
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• 제40권3_4호
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• pp.531-543
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• 2022

The article proposed a new type of data relationship: Positive Boolean dependencies by groups on block and slice in the database model of block form, where instead of considering value pairs, we consider a group of p values (p ≥ 2). From this new concept, the article stated and demonstrated the equivalence of the three types of deduction, namely: deduction by logic, deduction by block with groups, deduction by block has no more than p elements with groups. Operations on blocks or slices performed for index attributes on blocks, the properties related to this new concept as theorem the equivalen of the three types of deduction, closure of set positive Boolean dependencies by groups and representation and tight representation set of positive Boolean dependencies by groups when the block degenerated into relation are true in the relational database model and also stated and proven in this paper.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2009년도 정보 및 제어 심포지움 논문집
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• pp.313-315
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• 2009

In this thesis, A methodology of system implement for PID controller, PWM logic, HSC logic, Host Communication and external DAC interface are implemented into single FPGA chip is proposed. The implemented system is used to control the speed of DC servo motor. A DATA block transfers set point value(SV) and P, I, D gain parameters to the corresponding Blocks respectively by the Host Communication to Computer. A HSC block generates process value(PV) by a pulse and $90^{\circ}$ shifted pulse from the encoder A PID block makes error(E) signal from the set value and process value and output manufacture value(MV) through the PID controller. In PWM block using the MV from the PID block, drives H-bridge controlling the Motor. Also DAC interface controls the DAC to graph the digital signal such as SV, PV, E, MV in FPGA onto the Oscilloscope.

• 한국컴퓨터정보학회논문지
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• 제22권3호
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• pp.9-16
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• 2017

In recent computing systems, LRU replacement policy has been widely used because it can be simply implemented and applicable to most programs. However, if the working set size of the program is bigger than the actual cache size, LRU replacement policy may occur thrashing problem. Thrashing problem means that cache blocks are consistently replaced without re-referencing in the cache. This paper proposes a new cache management scheme to solve the thrashing problem in the second-level cache. The proposed scheme measures per set reuse frequency using EAF structure to find thrashing sets. When the cache miss occurs, it tests whether the address of the missed block is stored or not. If the address of the missed block is stored, it means that the recently evicted block is re-requested, so the reuse frequency is predicted high. In this case, the corresponding counter of the set is increased. When the counter value is bigger than the threshold value, we assume that the corresponding set shows high reuse frequency. The proposed scheme assigns the set with high reuse frequency to the additional small size cache to keep the blocks in the cache for a long time. Our experimental results show that the proposed scheme improves the IPC by 3.81% on average.

• 대한전자공학회논문지
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• 제24권6호
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• pp.1056-1067
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• 1987

This paper presents a design procedure for building block integrated circuits that is based on the digraph relaxation model. A set of optimization procedure is prosented for a minimum area and routing-fecsible placement of IC building blocks. Chip area optimization is subject to perimeter and area constraints on the component rectangles in the dissection.

• 한국컴퓨터정보학회논문지
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• 제20권11호
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• pp.1-8
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• 2015

Flash memory has advantages in that it is fast access speed, low-power, and low-price. Therefore, they are widely used in electronics industry sectors. However, the flash memory has weak points, which are the limited number of erase operations and non-in-place update problem. To overcome the limited number of erase operations, many wear leveling techniques are studied. They use many tables storing information such as erase count of blocks, hot and cold block indicators, reference count of pages, and so on. These tables occupy some space of main memory for the wear leveling techniques. Accordingly, they are not appropriate for low-power devices limited main memory. In order to resolve it, a wear leveling technique using bit array and Bit Set Threshold (BST) for flash memory. The proposing technique reduces the used space of main memory using a bit array table, which saves the history of block erase operations. To enhance accuracy of cold block information, we use BST, which is calculated by using the number of invalid pages of the blocks in a one-to-many mode, where one bit is related to many blocks. The performance results illustrate that the proposed wear leveling technique improve life time of flash memory to about 6%, compared with previous wear leveling techniques using a bit array table in our experiment.

• Wind and Structures
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• 제10권4호
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• pp.301-314
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• 2007

The lever-type active multiple tuned mass dampers (LT-AMTMD), consisting of several lever-type active tuned mass dampers (LT-ATMD), is proposed in this paper to attenuate the vibrations of long-span bridges under the excitation directly acting on the structure, rather than through the base. With resorting to the derived analytical-expressions for the dynamic magnification factors of the LT-AMTMD structure system, the performance assessment then is conducted on the LT-AMTMD with the identical stiffness and damping coefficient but unequal mass. Numerical results indicate that the LT-AMTMD with the actuator set at the mass block can provide better effectiveness in reducing the vibrations of long-span bridges compared to the LT-AMTMD with the actuator set at other locations. An appealing feature of the LT-AMTMD with the actuator set at the mass block is that the static stretching of the spring may be freely adjusted in accordance with the practical requirements through changing the location of the support within the viable range while maintaining the same performance (including the same stroke displacement). Likewise, it is shown that the LT-AMTMD with the actuator set at the mass block can further ameliorate the performance of the lever-type multiple tuned mass dampers (LT-MTMD) and has higher effectiveness than a single lever-type active tuned mass damper (LT-ATMD). Therefore, the LT-AMTMD with the actuator set at the mass block may be a better means of suppressing the vibrations of long-span bridges with the consequence of not requiring the large static stretching of the spring and possessing a desirable robustness.

• 한국철도학회:학술대회논문집
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• 한국철도학회 2011년도 정기총회 및 추계학술대회 논문집
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• pp.2726-2730
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• 2011

This paper proposes a CBTC wayside signaling system, which redeems existing track-circuit-based ones by using movement authorities mixed with logical block and moving block. Only one train can be entered into the logical block or the route for existing wayside signaling system. Applying moving block for CBTC system enables the train to get nearer to the preceding one, because its protection mechanism uses train's safe boundary, not fixed block unit. By narrowing the existing route set to switch machine and applying the moving block beyond that area, more than one train can enter into one route area. This paper shows that the efficient train control, i.e. shortening the headway, is possible using the moving block mixed with logical block in wayside signaling system.