• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2002년도 하계학술대회 논문집
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• pp.156-159
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• 2002

Film Bulk Acoustic wave Resonator (FBAR) using thin piezoelectric films can be fabricated as monolithic integrated devices with compatibility to semiconductor process, leading to small size, low cost and high Q RF circuit elements with wide applications in communications area. This paper presents a MMIC compatible Suspended FBAR using surface micromachining. It is possible to make Si$_3$N$_4$/SiO$_2$/Si$_3$N$_4$membrane by using surface micromachining and its good effect is to remove the substrate silicon loss. FBAR was made on 2$\mu\textrm{m}$ multi-layered membrane using CVD process. According to our result, Fabricated film bulk acoustic wave resonator has two adventages. First, in the respect of device Process, our Process of the resonator using surface micromachining is very simple better than that of resonator using bull micromachining. Second, because of using the multiple layer, thermal expansion coefficient is compensated, so, the stress of thin film is reduced.

• JSTS:Journal of Semiconductor Technology and Science
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• 제7권2호
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• pp.94-97
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• 2007

The desin and implementation of a CMOS analog integrated circuit that provides dual-mode modulations, PWM for active clamp reset converter and PFM for LLC resonant converter, is described. The proposed controller is capable of implementing programmable soft start and current-mode control with compensating ramp for PWM and frequency shifting soft start for PFM. Also it provides delay time for both modes. PWM mode is implemented by active clamp reset converter and PFM mode is implemented by LLC resonant convereter, respectively. The chip is fabricated using the 0.6um high voltage CMOS process.

• JSTS:Journal of Semiconductor Technology and Science
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• 제7권4호
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• pp.274-280
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• 2007

This paper demonstrates an efficiency improvement of the class E power amplifier (PA) by tuning-out the input capacitance ($C_{IN}$) of the power HBT with a shunt inductance. In order to obtain high output power, the PA needs the large emitter size of a transistor. The larger the emitter size, the higher the parasitic capacitance. The parasitic $C_{IN}$ affects the distortion of the voltage signal at the base node and changes the duty cycle to decrease the PA's efficiency. Adopting the L-C resonance, we obtain a remarkable efficiency improvement of as much as 7%. This PA exhibits output power of 29 dBm and collector efficiency of 71% at 1.9 GHz.

• 한국통신학회논문지
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• 제7권3호
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• pp.112-119
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• 1982

CCITT V.26에 의거한 4-위상 DPSK 2400bps 모뎀이 설계 구성되었다. 회로 전체가 집적회로소자를 이용해 구성되었으며 능동 여파기와 반도체 지연장치가 사용되었다. 동기신호의 재생에 있어서 새롭고 간단한 방법을 시도하여 그 타당성을 확인하였다. Gaussian 잡음에 대한 에러율은(error rate) 이론치와의 차이가 매우 근소함이 확인되었다.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2005년도 추계학술대회 논문집 Vol.18
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• pp.105-106
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• 2005

As the integrated circuit device shrinks to the smaller dimension, the chemical mechanical polishing (CMP) process has been widely used in microelectronics and semiconductor processes. Indium tin oxide (ITO) thin film was polished by CMP by the change of process parameters for the improvement of CMP performance. Removal rate and planarity were improved after CMP process at the optimized process parameters compared to that before CMP process.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 1994년도 추계학술대회 논문집
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• pp.40-45
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• 1994

The TCAD(Technology Computer Aided Design) software tool is a popular name to be able to simulate the semiconductor process and device circuit. We have developed a two-dimensional TCAD software tool included an editor, parser, each process unit, and 2D, 3D graphic routine that is Integrated Environment. The initial grid for numerical analysis is automatically generated with the geometric series that use the user default(given) line and position separated with grid interval and the nodes corresponding to each mesh point stoic the all the possible attribute. Also, we made a data structure called PIF for input or output. Methods of ion implantation in this paper arc Monte Carlo, Gaussian Pearson and Dual-Pearson. Analytical model such as Gaussian, Pearson and Dual-Pearson were considered the multilayer structure and two-dimensional tilted implantation. We simuttaneously calculated the continuity equation of impurity and point defect in diffusion simulation. Oxidation process was simulated by analytical ERFC(Complementary Error Function) model for local oxidation.

• 한국자동차공학회논문집
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• 제16권5호
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• pp.113-118
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• 2008

We have developed an integrated giant magneto resistance using not only circuit but also integrating technique with semiconductor for automobile application. It has four elements used for giant magneto resistance sensor. Ni-Fe/Cu multi layers were prepared on a glass substrate by magnetron sputtering. The dependence of magneto resistance on the thickness of the Ni-Fe and Cu layers was investigated. The MR ratio showed a saturated a peak at Cu layer $10{\AA}$, Ni-Fe layer $50{\AA}$, where the MR ratio is about 8.7% at room temperature. By means of Ni-Fe multi film and specific integrating technique, these new giant magneto resistance sensor showed excellent resistance characteristics.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1988년도 전기.전자공학 학술대회 논문집
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• pp.370-374
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• 1988

This paper is concerned with the investigation of the impurity redistribution process in a two step diffusion. In integrated circuit technology, two step boron diffusion involving a deposition step followed by a drive-in step in commonly encounted. The drive-in process is usually performed in oxidizing atmosphere resulting in redistribution of impurity (boron) within the semiconductor. This paper proposes a new numerical analysis method; Bounary Element Method to determine impurity profile at the arbitrary point in domain by its coordinate and boundary value.

• 한국전기전자재료학회논문지
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• 제15권12호
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• pp.1039-1044
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• 2002

Film Bulk Acoustic Resonator (FBAR) using thin piezoelectric films can be made as monolithic integrated devices with compatibility to semiconductor process, leading to small size, low cost and high Q RF circuit elements with wide applications in communications area. This paper presents an MMIC compatible suspended FBAR using SOI micromachining. It is possible to make a single crystal silicon membrane using a SOI wafer In fabricating active devices, SOI wafer offers advantage which removes the substrate loss. FBAR was made on the 12㎛ silicon membrane. Electrode and Piezoelectric materials were deposited by RF magnetron sputter. The maximum resonance frequency of FBAR was shown at 2.5GHz range. The reflection loss, K$^2$$\_$eff/, Q$\_$serise/ and Q$\_$parallel/ in that frequency were 1.5dB, 2.29%, 220 and 160, respectively.

• 대한전자공학회논문지
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• 제27권4호
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• pp.563-570
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• 1990

A silicon pressure sensor made of a full bridge of diffused resistors was designed and fabricated using semiconductor integrated circuit process. Thin diaphragms with 30\ulcorner thickness were obtained using anisotropic wet chemical etching technique. Our device showed strong temperature dependence. Compensation networks are used to compensate for the temperature dependence of the pressure sensor. The bridge supply voltage having positive temperature coefficient by compensation networks was utilized against the negative temperature coefficient of bridge output voltage. The sensitivity fluctuation of pressure sensor before temperature compensation was -1700 ppm/\ulcorner, while it reduced to -710ppm\ulcorner with temperature compensation. Our result shows that the we could develop accurate and reliable pressure sensor over a wide temperature range(-20\ulcorner~50\ulcorner).