• E2M - 전기 전자와 첨단 소재
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• 제8권1호
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• pp.56-63
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• 1995

MESFETs of the Ti/Au and Ti/Pd/Au gate were fabricated on n-type GaAs. Interdiffusion at Schottky interfaces, Schottky contact properties, and MESFET characteristics with heat treatment were investigated. Ti of Ti/Au contact and Pd of Ti/Pd/Au contact acted as a barrier metal against interdiffusion of Au at >$220^{\circ}C$. Pd of Ti/Pd/Au contact acted as a barrier metal even at >$360^{\circ}C$, however, Ti of Ti/Au contact promoted interdiffusion of Au instead of role of barrier metal. As the heat treatment temperature increases, in the case of both contact, saturated drain current and pinch off voltage decreased, open channel resistance increased, and degree of parameter variation in Ti/Au gate was higher than in Ti/Pd/Au gate at >$360^{\circ}C$ Schottky barrier height of Ti/Au and Ti/Pd/Au contacts was 0.69eV and 0.68eV in the as-deposited state, respectively, and Fermi level was pinned in the vicinity of 1/2Eg. As the heat treatment temperature increases, barrier height of Ti/Pd/Au contact increased, however, decreased at >$360^{\circ}C$ in the case of Ti/Au contact. Ideality factor of Ti/Au contact was nearly constant regardless of heat treatment, however, increased at >$360^{\circ}C$ in the case of Ti/Au contact. From the results above, Ti/Pd/Au was stable gate metal than Ti/Au.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2016년도 제50회 동계 정기학술대회 초록집
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• pp.287.2-287.2
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• 2016

Silicon has considerably good characteristics on electron, hole mobility and its price. With 2-D sinlge-layer Graphene/n-Si heterojunction solar cell shows that in one sun condition exhibit power conversion efficiency(PCE) of 10.1%. This photovoltaic effect was achieved by applying gate voltage to the Schottky junction of the heterostructure solar cell. Energy band diagram shows that Schottky barrier between Si and graphene can be adjust by the external electric field. because of the fermi level of the graphene can be changed by external gate voltage, we can control the Schottkky barrier of the heterostructure solar cell. The ratio between generated power of solar cell and consumption electrical power is remarkable. Since we use the graphene as the top gate electrode, most of the sun light can penetrate into the active area.

• JSTS:Journal of Semiconductor Technology and Science
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• 제5권2호
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• pp.69-76
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• 2005

Interface-trap density, lifetime and Schottky barrier height of erbium-silicided Schottky diode are evaluated using equivalent circuit method. The extracted interface trap density, lifetime and Schottky barrier height for hole are determined as $1.5{\times}10^{13} traps/cm^2$, 3.75 ms and 0.76 eV, respectively. The interface traps are efficiently cured by $N_2$ annealing. Based on the diode characteristics, various sizes of erbium- silicided/platinum-silicided n/p-type Schottky barrier metal-oxide-semiconductor field effect transistors (SB-MOSFETs) are manufactured from 20 m to 35nm. The manufactured SB-MOSFETs show excellent drain induced barrier lowering (DIBL) characteristics due to the existence of Schottky barrier between source and channel. DIBL and subthreshold swing characteristics are compatible with the ultimate scaling limit of double gate MOSFETs which shows the possible application of SB-MOSFETs in nanoscale regime.

• JSTS:Journal of Semiconductor Technology and Science
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• 제4권2호
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• pp.94-99
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• 2004

silicided 50-nm-gate-length n-type Schottky barrier metal-oxide-semiconductor field-effect-transistors (SB-MOSFETs) with 5 nm gate oxide thickness are manufactured. The saturation current is $120{\mu}A/{\mu}m$ and on/off-current ratio is higher than $10^5$ with low leakage current less than $10{\mu}A/{\mu}m$. Novel phenomena of this device are discussed. The increase of tunneling current with the increase of drain voltage is explained using drain induced Schottky barrier thickness thinning effect. The abnormal increase of drain current with the decrease of gate voltage is explained by hole carrier injection from drain into channel. The mechanism of threshold voltage increase in SB-MOSFETs is discussed. Based on the extracted model parameters, the performance of 10-nm-gate-length SB-MOSFETs is predicted. The results show that the subthreshold swing value can be lower than 60 mV/decade.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2003년도 하계종합학술대회 논문집 II
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• pp.779-782
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• 2003

The theoretical and experimental current-voltage characteristics of Erbium silicided n-type Schottky barrier tunneling transistors (SBTTs) are discussed. The theoretical drain current to drain voltage characteristics show good correspondence and the extracted Schottky barrier height is 0.24 eV. The experimentally manufactured n-type SBTTs with 60 nm gate lengths show typical transistor behaviors in drain current to drain voltage characteristics. The drain current on/off ratio is about 10$^{5}$ at low drain voltage regime in drain current to gate voltage characteristics.

• 전기전자학회논문지
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• 제22권2호
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• pp.484-487
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• 2018

5 MeV proton-irradiation with total dose of $10^{15}/cm^2$ was performed on AlGaN/GaN-on-Si high electron mobility transistors (HEMTs) with various gate metals including Ni, TaN, W, and TiN to investigate the degradation characteristics. The positive shift of pinch-off voltage and the reduction of on-current were observed from irradiated HEMTs regardless of a type of gate materials. Hall and transmission line measurements revealed the reduction of carrier mobility and sheet charge concentration due to displacement damage by proton irradiation. The shift of pinch-off voltage was dependent on Schottky barrier heights of gate metals. Gate leakage and capacitance-voltage characteristics did not show any significant degradation demonstrating the superior radiation hardness of Schottky gate contacts on GaN.

• Transactions on Electrical and Electronic Materials
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• 제16권4호
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• pp.187-189
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• 2015

A charge-trap flash (CTF) thin film transistor (TFT) memory is proposed at a low-temperature process (≤ 450℃). The memory cell consists of a sputtered oxide-nitride-oxide (ONO) gate dielectric and Schottky barrier (SB) source/drain (S/D) junctions using nickel silicide. These components enable the ultra-low-temperature process to be successfully achieved with the ONO gate stacks that have a substrate temperature of room temperature and S/D junctions that have an annealing temperature of 200℃. The silicidation process was optimized by measuring the electrical characteristics of the Ni-silicided Schottky diodes. As a result, the Ion/Ioff current ratio is about 1.4×10⁵ and the subthreshold swing and field effect mobility are 0.42 V/dec and 14 cm²/V·s at a drain voltage of −1 V, respectively.

• 대한전자공학회논문지SD
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• 제46권4호
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• pp.21-27
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• 2009

본 연구에서는 고온에서 Schottky barrier SOI nMOS 및 pMOS의 전류-전압 특성을 분석하기 위해서 Er 실리사이드를 갖는 SB-SOI nMOSFET와 Pt 실리사이드를 갖는 SB-SOI pMOSFET를 제작하였다. 게이트 전압에 따른 SB-SOI nMOS 및 pMOS의 주된 전류 전도 메카니즘을 온도에 따른 드레인 전류 측정 결과를 이용하여 설명하였다. 낮은 게이트 전압에서는 온도에 따라 열전자 방출 및 터널링 전류가 증가하므로 드레인 전류가 증가하고 높은 게이트 전압에서는 드리프트 전류가 감소하여 드레인 전류가 감소하였다. 고온에서 ON 전류가 증가하지만 드레인으로부터 채널영역으로의 터널링 전류 증가로 OFF 전류가 더 많이 증가하게 되므로 ON/OFF 전류비는 감소함을 알 수 있었다. 그리고 SOI 소자나 bulk MOSFET 소자에 비해 SB-SOI nMOS 및 pMOS의 온도에 따른 문턱전압 변화는 작았고 subthreshold swing은 증가하였다.

• 센서학회지
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• 제26권2호
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• pp.79-84
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• 2017

The drain current of the SB MOSFET was analytically modeled by an equation composed of thermionic emission and tunneling with consideration of the image force lowering. The depletion region electron concentration was used to model the channel electron concentration for the tunneling current. The Schottky barrier width is dependent on the channel electron concentration. The drain current is changed by the gate oxide thickness and Schottky barrier height, but it is hardly changed by the doping concentration. For a GaN SB MOSFET with ITO source and drain electrodes, the calculated threshold voltage was 3.5 V which was similar to the measured value of 3.75 V and the calculated drain current was 1.2 times higher than the measured.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2015년도 제49회 하계 정기학술대회 초록집
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• pp.209.2-209.2
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• 2015

Two dimensional layered materials, such as transition metal dichalcogenides (TMDs) family have been attracted significant attention due to novel physical and chemical properties. Among them, molybdenum disulfide ($MoS_2$) has novel physical phenomena such as absence of dangling bonds, lack of inversion symmetry, valley degrees of freedom. Previous studies have shown that the interface of metal/$MoS_2$ contacts significantly affects device performance due to presence of a scalable Schottky barrier height at their interface, resulting voltage drops and restricting carrier injection. In this study, we report a new device structure by using few-layer graphene as the bottom interconnections, in order to offer Schottky barrier free contact to bi-layer $MoS_2$. The fabrication of process start with mechanically exfoliates bulk graphite that served as the source/drain electrodes. The semiconducting $MoS_2$ flake was deposited onto a $SiO_2$ (280 nm-thick)/Si substrate in which graphene electrodes were pre-deposited. To evaluate the barrier height of contact, we employed thermionic-emission theory to describe our experimental findings. We demonstrate that, the Schottky barrier height dramatically decreases from 300 to 0 meV as function of gate voltages, and further becomes negative values. Our findings suggested that, few-layer graphene could be able to realize ohmic contact and to provide new opportunities in ohmic formations.