• JSTS:Journal of Semiconductor Technology and Science
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• v.15 no.1
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• pp.7-15
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• 2015

We have investigated electrical properties of graphene/Ge Schottky barrier diode (SBD) fabricated on Ge film epitaxially grown on Si substrate. When decreasing temperature, barrier height decreased and ideality factor increased, implying their strong temperature dependency. From the conventional Richardson plot, Richardson constant was much less than the theoretical value for n-type Ge. Assuming Gaussian distribution of Schottky barrier height with mean Schottky barrier height and standard deviation, Richardson constant extracted from the modified Richardson plot was comparable to the theoretical value for n-type Ge. Thus, the abnormal temperature dependent Schottky behavior of graphene/Ge SBD could be associated with a considerable deviation from the ideal thermionic emission caused by Schottky barrier inhomogeneities.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.27 no.10
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• pp.618-622
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• 2014

The temperature dependent characteristics on the properties of SiC Schottky Diode has been investigated. In this study, the temperature dependent current-voltage characteristics of the SiC Schottky diode were measured in the range of 300 ~ 500 K. Divided into pre- and post- irradiated device was measured. The barrier height after irradiation device at 500 K increased 0.15 eV compared to 300 K, the barrier height of pre- neutron irradiated Schottky diode increased 0.07 eV. The effective barrier height after irradiation increased from 0.89 eV to 1.05 eV. And ideality factor of neutron irradiated Schottky diode at 500 K decreased 0.428 compared to 300 K, the ideality factor of pre- neutron irradiated Schottky diode decreased 0.354. Also, a slight positive shift in threshold voltage from 0.53 to 0.68 V. we analyzed the effective barrier height and ideality factor of SiC Schottky diode as function of temperature.

• ETRI Journal
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• v.24 no.6
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• pp.455-461
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• 2002

This paper reports on estimating the Schottky barrier height of small contacts using a thermionic-field emission model. Our results indicate that the logarithmic plot of the current as a function of bias voltage across the Schottky diode gives a linear relationship, while the plot as a function of the total applied voltage across a metal-silicon contact gives a parabolic relationship. The Schottky barrier height is extracted from the slope of the linear line resulting from the logarithmic plot of current versus bias voltage across the Schottky diode. The result reveals that the barrier height decreases from 0.6 eV to 0.49 eV when the thickness of the barrier metal is increased from 500 ${\AA}$ to 900 ${\AA}$. The extracted impurity concentration at the contact interface changes slightly with different Ti thicknesses with its maximum value at about $2.9{\times}10^{20}\;cm^{-3}$, which agrees well with the results from secondary ion mass spectroscopy (SIMS) measurements.

• JSTS:Journal of Semiconductor Technology and Science
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• v.3 no.1
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• pp.1-12
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• 2003

This paper describes a study on the abnormal behavior of the electrical characteristics of the (n)GaAs/Ti/Pt/Au Schottky contacts prepared by the two techniques of electron beam deposition and rf sputtering and after an annealing treatment. The samples were characterized by I-V and C-V measurements carried out over the temperature range of 150 - 350 K both in the as prepared state and after a 300 C, 30 min. anneal step. The variation of ideality factor with forward bias, the variation of ideality factor and barrier height with temperature and the difference between the capacitance barrier and current barrier show the presence of a thin interfacial oxide layer along with barrier height inhomogenieties at the metal/semiconductor interface. This barrier height inhomogeneity model also explains the lower barrier height for the sputtered samples to be due to the presence of low barrier height patches produced because of high plasma energy. After the annealing step the contacts prepared by electron beam have the highest typical current barrier height of 0.85 eV and capacitance barrier height of 0.86 eV whereas those prepared by sputtering (at the highest power studied) have the lowest typical current barrier height of 0.67 eV and capacitance barrier height of 0.78 eV.

• JSTS:Journal of Semiconductor Technology and Science
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• v.5 no.2
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• pp.69-76
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• 2005

Interface-trap density, lifetime and Schottky barrier height of erbium-silicided Schottky diode are evaluated using equivalent circuit method. The extracted interface trap density, lifetime and Schottky barrier height for hole are determined as $1.5{\times}10^{13} traps/cm^2$, 3.75 ms and 0.76 eV, respectively. The interface traps are efficiently cured by $N_2$ annealing. Based on the diode characteristics, various sizes of erbium- silicided/platinum-silicided n/p-type Schottky barrier metal-oxide-semiconductor field effect transistors (SB-MOSFETs) are manufactured from 20 m to 35nm. The manufactured SB-MOSFETs show excellent drain induced barrier lowering (DIBL) characteristics due to the existence of Schottky barrier between source and channel. DIBL and subthreshold swing characteristics are compatible with the ultimate scaling limit of double gate MOSFETs which shows the possible application of SB-MOSFETs in nanoscale regime.

• Proceedings of the Korean Vacuum Society Conference
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• 2015.08a
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• pp.209.2-209.2
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• 2015

Two dimensional layered materials, such as transition metal dichalcogenides (TMDs) family have been attracted significant attention due to novel physical and chemical properties. Among them, molybdenum disulfide ($MoS_2$) has novel physical phenomena such as absence of dangling bonds, lack of inversion symmetry, valley degrees of freedom. Previous studies have shown that the interface of metal/$MoS_2$ contacts significantly affects device performance due to presence of a scalable Schottky barrier height at their interface, resulting voltage drops and restricting carrier injection. In this study, we report a new device structure by using few-layer graphene as the bottom interconnections, in order to offer Schottky barrier free contact to bi-layer $MoS_2$. The fabrication of process start with mechanically exfoliates bulk graphite that served as the source/drain electrodes. The semiconducting $MoS_2$ flake was deposited onto a $SiO_2$ (280 nm-thick)/Si substrate in which graphene electrodes were pre-deposited. To evaluate the barrier height of contact, we employed thermionic-emission theory to describe our experimental findings. We demonstrate that, the Schottky barrier height dramatically decreases from 300 to 0 meV as function of gate voltages, and further becomes negative values. Our findings suggested that, few-layer graphene could be able to realize ohmic contact and to provide new opportunities in ohmic formations.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.13 no.5
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• pp.365-370
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• 2000

Schottky contacts on n-In$\_$0.53//Ga$\_$0.47//As have been made by metal deposition on substrates cooled to a temperature of 77K. The current-voltage and capacitance-voltage characteristics showed that the Schottky diodes formed at low temperature had a much improved barrier height compared to those formed at room temperature. The Schottky barrier height ø$\_$B/ was found to be increased from 0.2eV to 0.6eV with Ag metal. The saturation current density of the low temperature diode was about 4 orders smaller than for the room temperature diode. A current transport mechanism dominated by thermionic emission over the barrier for the low temperature diode was found from current-voltage-temperature measurement. Deep level transient spectroscopy studies exhibited a bulk electron trap at E$\_$c/-0.23eV. The low temperature process appears to reduce metal induced surface damage and may form an MIS (metal-insulator-semiconductor)-like structure at the interface.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.24 no.4
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• pp.271-275
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• 2011

In this paper, thermal stability of palladium germanide (Pd germanide) is analyzed for high performance Schottky barrier germanium metal oxide semiconductor field effect transistors (SB Ge-MOSFETs). Pd germanide Schottky barrier diodes were fabricated on n-type Ge-on-Si substrates and the formed Pd germanide shows thermal immunity up to $450^{\circ}C$. The barrier height of Pd germanide is also characterized using two methods. It is shown that Pd germanide contact has electron Schottky barrier height of 0.569~0.631 eV and work function of 4.699~4.761 eV, respectively. Pd germanide is promising for the nanoscale Schottky barrier Ge channel MOSFETs.

• Journal of the Korean Institute of Telematics and Electronics D
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• v.35D no.11
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• pp.70-77
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• 1998

Ni/SiC Schottky diodes have been fabricated using epitaxial 4H-SiC and 6H-SiC wafers. The epitaxial n-type layers were grown on $n^{+}$ substrates, with a doping density of 4.0$\times$10$^{16}$ c $m^{-3}$ and a thickness of 10${\mu}{\textrm}{m}$. Oxide-termination has been adopted in order to obtain high breakdown voltage and low leakage current. The fabricated Ni/4H-SiC and Ni/6H-SiC Schottky barrier diodes show excellent rectifying characteristics up to the measured temperature range of 55$0^{\circ}C$. In case of oxide-terminated Schottky barrier diodes, breakdown voltage of 973V(Ni/4H-SiC) and 920V(Ni/6H-SiC), and a very low leakage current of less than 1nA at -800V has been observed at room temperature. On non-terminated Schottky barrier diodes, breakdown voltages were 430V(Ni/4H-SiC) and 160v(Ni/6H-SiC). At room temperature, SBH(Schottky Barrier Height), ideality factor and specific on-resistance were 1.55eV, 1.3, 3.6$\times$10$^{-2}$ $\Omega$.$\textrm{cm}^2$ for Ni/4H-SiC Schottky barrier diodes, and 1.24eV, 1.2, 2.6$\times$10$^{-2}$$\Omega$.$\textrm{cm}^2$/ for Ni/SH-SiC Schottky barrier diodes, respectively. These results show that both Ni/4H-SiC and Ni/6H-SiC Schottky barrier diodes are very promising for high-temperature and high power applications.s..

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.23 no.10
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• pp.763-766
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• 2010

By improving the conducting process of metal source/drain (S/D) in direct contact with the channel, schottky barrier metal-oxide-semiconductor field effect transistors (SB MOSFETs) reveal low extrinsic parasitic resistances, offer easy processing and allow for well-defined device geometries down to the smallest dimensions. In this work, we investigated the arrhenius plots of the SB MOSFETs with different S/D schottky barrier (SB) heights between simulated and experimental current-voltage characteristics. We fabricated SB MOSFETs using difference S/D metals such as Cr (${\Phi}_{Cr}$ ~4.5 eV) and Ni (${\Phi}_{Ni}$~5.2 eV), respectively. Schottky barrier height (${\Phi}_B$) of the fabricated devices were measured to be 0.25~0.31 eV (Cr-S/D device) and 0.16~0.18 eV (Ni-S/D device), respectively in the temperature range of 300 K and 475 K. The experimental results have been compared with 2-dimensional simulations, which allowed bandgap diagram analysis.