• Title/Summary/Keyword: Schottky Effect

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Low-Temperature Poly-Si TFT Charge Trap Flash Memory with Sputtered ONO and Schottky Junctions

  • An, Ho-Myoung;Kim, Jooyeon
    • Transactions on Electrical and Electronic Materials
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    • v.16 no.4
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    • pp.187-189
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    • 2015
  • A charge-trap flash (CTF) thin film transistor (TFT) memory is proposed at a low-temperature process (≤ 450℃). The memory cell consists of a sputtered oxide-nitride-oxide (ONO) gate dielectric and Schottky barrier (SB) source/drain (S/D) junctions using nickel silicide. These components enable the ultra-low-temperature process to be successfully achieved with the ONO gate stacks that have a substrate temperature of room temperature and S/D junctions that have an annealing temperature of 200℃. The silicidation process was optimized by measuring the electrical characteristics of the Ni-silicided Schottky diodes. As a result, the Ion/Ioff current ratio is about 1.4×105 and the subthreshold swing and field effect mobility are 0.42 V/dec and 14 cm2/V·s at a drain voltage of −1 V, respectively.

The modified HSINFET using the trenched hybrid injector (트렌치 구조의 Hybrid Schottky 인젝터를 갖는 SINFET)

  • 김재형;김한수;한민구;최연익
    • The Transactions of the Korean Institute of Electrical Engineers
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    • v.45 no.2
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    • pp.230-234
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    • 1996
  • A new trenched Hybrid Schottky INjection Field Effect Transistor (HSINFET) is proposed and verified by 2-D semiconductor device simulation. The feature of the proposed structure is that the hybrid Schottky injector is implemented at the trench sidewall and p-n junction injector at the upper sidewall and bottom of a trench. Two-dimensional simulation has been performed to compare the new HSINFET with the SINFET, conventional HSINFET and lateral insulated gate bipolar transistor(LIGBT). The numerical results shows that the current handling capability of the proposed HSINFET is significantly increased without sacrificing turn-off characteristics. The proposed HSINFET exhibits higher latch-up current density and much faster switching speed than the lateral IGBT. The forward voltage drop of the proposed HSINFET is 0.4 V lower than that of the conventional HSINFET and the turn-off time of the trenched HSINFET is much smaller than that of LIGBT.

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Transistor Characteristics by the Effect of Leakage Current Cutoff of Schottky Contact (누설전류차단 쇼키접합 트랜지스터 전달특성)

  • Oh, Teresa
    • Journal of the Semiconductor & Display Technology
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    • v.17 no.2
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    • pp.32-35
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    • 2018
  • The current voltage characteristics of ZTO/SiOC were researched, and the conductivities of the ZTO films as a channel material were analyzed. The current of SiOC was abruptly decreased near 0V, and then the depletion layer was formed by the disappearance of charges in the region form -12V to +12V. SiOC with Schottky contacts near ${\sim}10^{-9}$ A had the cutoff effect of leakage currents. The conductivity of ZTOs prepared on SiOC was improved in the cutoff region of the leakage current of -12V

Thermo-Field emission in silicon nanomembrane ion detector for mass spectrometry (실리콘 나노 박막의 열-전계 방출효과를 이용한 분자 질량분석)

  • Park, Jong-Hoo
    • Journal of the Korean Applied Science and Technology
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    • v.30 no.4
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    • pp.586-591
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    • 2013
  • This paper describes the characteristics of thermo-field emission in a freestanding silicon nanomembrane under ion bombardment with various thermal and field conditions. The thermal effect and field effect in thermo-field emission in silicon nanomembrane are investigated by varying kinetic energy of ions and electric field applied to the silicon nanomembrane surface, respectively. We found that thermo-field emission increases linearly as the electric field increases, when the electric field intensity is lower than the threshold. The thermo-field emission (schottky effect) increases proportionally to the power of temperature, which agree well with the predictions of a thermo-field emission model.

Low Temperature Characteristics of Schottky Barrier Single Electron and Single Hole Transistors

  • Jang, Moongyu;Jun, Myungsim;Zyung, Taehyoung
    • ETRI Journal
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    • v.34 no.6
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    • pp.950-953
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    • 2012
  • Schottky barrier single electron transistors (SB-SETs) and Schottky barrier single hole transistors (SB-SHTs) are fabricated on a 20-nm thin silicon-on-insulator substrate incorporating e-beam lithography and a conventional CMOS process technique. Erbium- and platinum-silicide are used as the source and drain material for the SB-SET and SB-SHT, respectively. The manufactured SB-SET and SB-SHT show typical transistor behavior at room temperature with a high drive current of $550{\mu}A/{\mu}m$ and $-376{\mu}A/{\mu}m$, respectively. At 7 K, these devices show SET and SHT characteristics. For the SB-SHT case, the oscillation period is 0.22 V, and the estimated quantum dot size is 16.8 nm. The transconductance is $0.05{\mu}S$ and $1.2{\mu}S$ for the SB-SET and SB-SHT, respectively. In the SB-SET and SB-SHT, a high transconductance can be easily achieved as the silicided electrode eliminates a parasitic resistance. Moreover, the SB-SET and SB-SHT can be operated as a conventional field-effect transistor (FET) and SET/SHT depending on the bias conditions, which is very promising for SET/FET hybrid applications. This work is the first report on the successful operations of SET/SHT in Schottky barrier devices.

Experimental and Simulation Study of Barrier Properties in Schottky Barrier Thin-Film Transistors with Cr- and Ni- Source/Drain Contacts (Cr- 및 Ni- 소스/드레인 쇼트키 박막 트랜지스터의 장벽 특성에 대한 실험 및 모델링 연구)

  • Jung, Ji-Chul;Moon, Kyoung-Sook;Koo, Sang-Mo
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.23 no.10
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    • pp.763-766
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    • 2010
  • By improving the conducting process of metal source/drain (S/D) in direct contact with the channel, schottky barrier metal-oxide-semiconductor field effect transistors (SB MOSFETs) reveal low extrinsic parasitic resistances, offer easy processing and allow for well-defined device geometries down to the smallest dimensions. In this work, we investigated the arrhenius plots of the SB MOSFETs with different S/D schottky barrier (SB) heights between simulated and experimental current-voltage characteristics. We fabricated SB MOSFETs using difference S/D metals such as Cr (${\Phi}_{Cr}$ ~4.5 eV) and Ni (${\Phi}_{Ni}$~5.2 eV), respectively. Schottky barrier height (${\Phi}_B$) of the fabricated devices were measured to be 0.25~0.31 eV (Cr-S/D device) and 0.16~0.18 eV (Ni-S/D device), respectively in the temperature range of 300 K and 475 K. The experimental results have been compared with 2-dimensional simulations, which allowed bandgap diagram analysis.

Stability Assessment of Lead Sulfide Colloidal Quantum Dot Based Schottky Solar Cell

  • Song, Jung-Hoon;Kim, Jun-Kwan;An, Hye-Jin;Choi, Hye-Kyoung;Jeong, So-Hee
    • Proceedings of the Korean Vacuum Society Conference
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    • 2012.08a
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    • pp.413-413
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    • 2012
  • Lead sulfide (PbS) Colloidal quantum dots (CQDs) are promising material for the photovoltaic device due to its various outstanding properties such as tunable band-gap, solution processability, and infrared absorption. More importantly, PbS CQDs have large exciton Bohr radius of 20 nm due to the uniquely large dielectric constants that result in the strong quantum confinement. To exploit desirable properties in photovoltaic device, it is essential to fabricate a device exhibiting stable performance. Unfortunately, the performance of PbS NQDs based Schottky solar cell is considerably degraded according to the exposure in the air. The air-exposed degradation originates on the oxidation of interface between PbS NQDS layer and metal electrode. Therefore, it is necessary to enhance the stability of Schottky junction device by inserting a passivation layer. We investigate the effect of insertion of passivation layer on the performance of Schottky junction solar cells using PbS NQDs with band-gap of 1.3 eV. Schottky solar cell is the simple photovoltaic device with junction between semiconducting layer and metal electrode which a significant built-in-potential is established due to the workfunction difference between two materials. Although the device without passivation layer significantly degraded in several hours, considerable enhancement of stability can be obtained by inserting the very thin LiF layer (<1 nm) as a passivation layer. In this study, LiF layer is inserted between PbS NQDs layer and metal as an interface passivation layer. From the results, we can conclude that employment of very thin LiF layer is effective to enhance the stability of Schottky junction solar cells. We believe that this passivation layer is applicable not only to the PbS NQDs based solar cell, but also the various NQDs materials in order to enhance the stability of the device.

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Analysis of Thermal Stability and Schottky Barrier Height of Pd Germanide on N-type Ge-on-Si Substrate (N형 Ge-on-Si 기판에 형성된 Pd Germanide의 열안정성 및 Schottky 장벽 분석)

  • Oh, Se-Kyung;Shin, Hong-Sik;Kang, Min-Ho;Bok, Jeong-Deuk;Jung, Yi-Jung;Kwon, Hyuk-Min;Lee, Ga-Won;Lee, Hi-Deok
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.24 no.4
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    • pp.271-275
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    • 2011
  • In this paper, thermal stability of palladium germanide (Pd germanide) is analyzed for high performance Schottky barrier germanium metal oxide semiconductor field effect transistors (SB Ge-MOSFETs). Pd germanide Schottky barrier diodes were fabricated on n-type Ge-on-Si substrates and the formed Pd germanide shows thermal immunity up to $450^{\circ}C$. The barrier height of Pd germanide is also characterized using two methods. It is shown that Pd germanide contact has electron Schottky barrier height of 0.569~0.631 eV and work function of 4.699~4.761 eV, respectively. Pd germanide is promising for the nanoscale Schottky barrier Ge channel MOSFETs.

Effect on Metal Guard Ring in Breakdown Characteristics of SiC Schottky Barrier Diode (금속 가드 링이 SiC 쇼트키 다이오드의 항복전압에 미치는 영향)

  • Kim, Seong-Jin
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.18 no.10
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    • pp.877-882
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    • 2005
  • In order to fabricate a high breakdown SiC-SBD (Schottky barrier diode), we investigate an effect on metal guard ring (MGR) in breakdown characteristics of the SiC-SBD. The breakdown characteristics of MGR-type SiC-SBD is significantly dependent on both the guard ring metal and the alloying time of guard ring metal. The breakdown characteristics of MGR-type SiC-SBDs are essentially improved as the alloying time of guard ring metal is increased. The SiC-SBD without MGR shows less than 200 V breakdown voltage, while the SiC-SBD with Al MGR shows approximately 700 V breakdown voltage. The improvement in breakdown characteristics is attributed to the field edge termination effect by the MGR, which is similar to an implanted guard ring-type SiC-SBD. There are two breakdown origins in the MGR-type SiC-SBD. One is due to a crystal defects, such as micropipes and stacking faults, in the Epi-layers and the SiC substrate, and occurs at a lower electric field. The other is due to the destruction of guard ring metal, which occurs at a higher electric field. The demolition of guard ring metal is due to the electric field concentration at an edge of Schottky contact metal.

Novel properties of erbium-silicided n-type Schottky barrier metal-oxide-semiconductor field-effect-transistors

  • Jang, Moon-Gyu;Kim, Yark-Yeon;Shin, Jae-Heon;Lee, Seong-Jae;Park, Kyoung-Wan
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.4 no.2
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    • pp.94-99
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    • 2004
  • silicided 50-nm-gate-length n-type Schottky barrier metal-oxide-semiconductor field-effect-transistors (SB-MOSFETs) with 5 nm gate oxide thickness are manufactured. The saturation current is $120{\mu}A/{\mu}m$ and on/off-current ratio is higher than $10^5$ with low leakage current less than $10{\mu}A/{\mu}m$. Novel phenomena of this device are discussed. The increase of tunneling current with the increase of drain voltage is explained using drain induced Schottky barrier thickness thinning effect. The abnormal increase of drain current with the decrease of gate voltage is explained by hole carrier injection from drain into channel. The mechanism of threshold voltage increase in SB-MOSFETs is discussed. Based on the extracted model parameters, the performance of 10-nm-gate-length SB-MOSFETs is predicted. The results show that the subthreshold swing value can be lower than 60 mV/decade.