• 한국전자거래학회:학술대회논문집
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• 한국전자거래학회 2000년도 종합학술대회발표논문집
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• pp.99-114
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• 2000

ㆍ General - ISO 10303-202 : Associative draughting (CDS initiatve) ㆍ Building Construction - ISO 10303-225 : Building elements using explicit shape representation - ISO 10303-230 : Building structural frames : steelwork (CIMSTEEL) (중략)

• Nano
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• 제13권12호
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• pp.1850147.1-1850147.14
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• 2018

In this work, water-soluble and blue-emitting carbon nanodots (CDs) were synthesized from apple peels for the first time via one-step hydrothermal method. The synthetic route is facile, green, economical and viable. The as-prepared CDs were characterized thoroughly by transmission electron microscopy (TEM), X-ray diffraction (XRD), Raman, Fourier transform infrared (FT-IR), X-ray photoelectron (XPS), fluorescence and UV-Vis absorption spectroscopy in terms of their morphology, surface functional groups and optical properties. The results show that these CDs possessed ultrasmall size, good dispersivity, and high tolerance to pH, ionic strength and continuous UV irradiation. Significantly, the CDs had fast and reversible response towards temperature, and the accurate linear relationship between fluorescence intensity and temperature was used to design a novel nanothermometer in a broad temperature range from 5 to $65^{\circ}C$ facilely. In addition, the fluorescence intensity of CDs was observed to be quenched immediately by Cr(VI) ions based on the inner filter effect. A low-cost Cr(VI) ions sensor was proposed employing CDs as fluorescent probe, and it displayed a wide linear range from 0.5 to $200{\mu}M$ with a detection limit of $0.73{\mu}M$. The practicability of the developed Cr(VI) sensor for real water sample assay was also validated with satisfactory recoveries.

• 전자공학회논문지
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• 제50권11호
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• pp.64-69
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• 2013

본 논문에서는 10-bit 해상도의 Two-Step Single-Slope A/D 변환기를 이용한 고속 CMOS Image Sensor(CIS)를 제안하였다. 제안하는 A/D 변환기는 5-bit coarse ADC 와 6-bit fine ADC 로 구성되어 있으며, 기존의 Single-Slope A/D 변환기보다 10배 이상의 변환속도를 나타내었다. 또한 고속 동작에서 적은 노이즈 특성을 갖기 위해 Digital Correlated Double Sampling(D-CDS) 회로를 제안하였다. 설계된 A/D 변환기는 0.13um 1-poly 4-metal CIS 공정으로 제작되었으며 QVGA($320{\times}240$)급 해상도를 갖는다. 제작된 칩의 유효면적은 $5mm{\times}3mm$ 이며 3.3V 전원전압에서 약 35mW의 전력소모를 나타내었다. 변환속도는 10us 이었으며, 프레임율은 220 frames/s으로 측정되었다.

• JSTS:Journal of Semiconductor Technology and Science
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• 제14권2호
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• pp.246-251
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• 2014

In this paper, a high-speed CMOS Image Sensor (CIS) based on a 10-bit two step Single Slope A/D Converter (SS-ADC) is proposed. The A/D converter is composed of both 5-bit coarse ADC and a 6-bit fine ADC, and the conversion speed is 10 times faster than that of the single-slope A/D convertor. In order to reduce the pixel noise, further, a Hybrid Correlated Double Sampling (H-CDS) is also discussed. The proposed A/D converter has been fabricated with 0.13um 1-poly 4-metal CIS process, and it has a QVGA ($320{\times}240$) resolution. The fabricated chip size is $5mm{\times}3mm$, and the power consumption is about 35 mW at 3.3 V supply voltage. The measured conversion speed is 10 us, and the frame rate is 220 frames/s.

• 한국CDE학회논문집
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• 제10권2호
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• pp.121-132
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• 2005

There have been several efforts for the investigation of the formal development team which was formed in the IAI to develop a common 2D standard specification between ISO/STEP and IAI/IFC since 2002. As a result, a drafting model has been included in the IFC2.x2 model. However, to be used actively in the construction practice for construction drawing exchange, the IFC model should be extended to the paper space for multiple views, drawing output, and delivery of drawings. Therefore, in this paper, the methodology of relating STEP and IFC has been investigated and schema extension of paper space(drawing sheet, presentation view, view pipeline), complex entity(leader), and dimension(associative) have been achieved. The resulting, IFC model will enable a basic harmonization with KOSDIC. SCADEC, and STEP-CDS by retaining the current IFC architecture. In addition, IT systems for the construction industry can be beneficial from the developed data model.

• 자동차안전학회지
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• 제10권4호
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• pp.40-49
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• 2018

Currently, a lot of researches about high risk test scenarios for autonomous vehicle and advanced driver assistance systems have been carried out to evaluate driving safety. This study proposes new type of test scenario that evaluate the driving safety for autonomous vehicle by reconstructing accident database of national automotive sampling system crashworthiness data system (NASS-CDS). NASS-CDS has a lot of detailed accident data in real fields, but there is no data of accurate velocity in accident moments. So in order to propose scenario generation method from accident database, we try to reconstruct accident moment from accident sketch diagram. At the same step, we propose an accident of occurrence frequency which is based on accident codes and road shapes. The reconstruction paths from accident database are integrated into evaluation of simulation environment. Our proposed methods and processor are applied to MILS (Model In the Loop Simulation) and VILS (Vehicle In the Loop Simulation) test environments. In this paper, a reasonable method of accident reconstruction typology for autonomous vehicle evaluation of feasibility is proposed.

• 전자공학회논문지 IE
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• 제43권4호
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• pp.37-42
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• 2006

본 논문에서는 MPEG2 부호화기내에서 워터마크 세기를 비트율과 움직임 벡터의 크기에 따라 적응적으로 조절하는 방법을 제안한다. I 프레임에 대하여는 양자화 스텝 크기에 따라 워터마크 세기를 가변적으로 조절하고, P, B 프레임은 고효율의 압축이 실현되므로 워터마크의 강인성을 유지하기 위해 비트율과 매크로 블록의 움직임 벡터의 크기에 따라 적응적으로 워터마크 세기를 조절한다. 워터마크 검출은 MPEG 동영상을 완전히 복호화하지 않고 MPEG 복호화시에 DCT 영역에서 실시간으로 검출한다. 실험 결과, 제안한 방법은 화질의 차이가 눈에 띄지 않고 GoP 변환후 동영상 재압축, 저주파 필터 공격과 프레임 삭제 등의 동영상 편집 공격에서도 강인함을 나타낸다.

• 한국전자거래학회지
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• 제9권2호
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• pp.87-108
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• 2004

기존의 건설산업에서는 건설산업의 전 생명주기 동안 발생하는 모든 설계도면과 시방서 및 문서를 방대한 분량의 종이로 관리하여 왔다. 그 결과 유사 공사 실적자료의 재사용, 설계자와 시공자간의 정보교환ㆍ공유에 있어 공사의 실적저하, 예산낭비 등의 문제를 가져왔다. 이러한 문제를 해결하기 위하여 건축 정보의 교환ㆍ공유에 기존의 형식인 종이대신 전자화 된 도면과 문서를 사용하도록 하는 업무개선의 요구가 있어왔고, 이러한 문제를 총체적으로 해결하기 위하여 정부차원의 건설분야 전자거래프로그램이 요구되게 되었다. 본 논문은 건설CALS/EC(Continuous Acquisition and Life Cycle Support/Electronic Commerce)와 관련된 요소기술의 국내외적인 적용사례를 바탕으로 하여 도면전자납품을 위한 건설 CALS/EC에서 표준기술이 되는 요소기술의 활용방안과 향후 개발 방향에 관하여 제시해 보고자 한다.

• 센서학회지
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• 제27권2호
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• pp.93-98
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• 2018

In this paper, an energy-efficient 11.49-bit successive approximation register (SAR) capacitance-to-digital converter (CDC) for capacitive sensors with a figure of merit (FoM) of 31.6 pJ/conversion-step is presented. The CDC employs a SAR algorithm to obtain low power consumption and a simplified structure. The proposed circuit uses a capacitive sensing amplifier (CSA) and a dynamic latch comparator to achieve parasitic capacitance-insensitive operation. The CSA adopts a correlated double sampling (CDS) technique to reduce flicker (1/f) noise to achieve low-noise characteristics. The SAR algorithm is implemented in dual operating mode, using an 8-bit coarse programmable capacitor array in the capacitance-domain and an 8-bit R-2R digital-to-analog converter (DAC) in the charge-domain. The proposed CDC achieves a wide input capacitance range of 29.4 pF and a high resolution of 0.449 fF. The CDC is fabricated in a $0.18-{\mu}m$ 1P6M complementary metal-oxide-semiconductor (CMOS) process with an active area of 0.55 mm2. The total power consumption of the CDC is $86.4{\mu}W$ with a 1.8-V supply. The SAR CDC achieves a measured 11.49-bit resolution within a conversion time of 1.025 ms and an energy-efficiency FoM of 31.6 pJ/step.

• 한국정보과학회:학술대회논문집
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• 한국정보과학회 2006년도 가을 학술발표논문집 Vol.33 No.2 (A)
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• pp.153-157
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• 2006

기존의 탐색 알고리즘은 탐색 창 내의 원점에서 탐색을 시작한다. 하지만 영상은 일정한 방향으로 규칙적으로 움직이는 것이 많기 때문에 Frame$_t$ 의 움직임 벡터(MV)가 Frame$_{t-1}$의 움직임 벡터와 같을 가능성이 크다. 이를 참고하여 본 논문에서는 시작점을 원점뿐만 아니라 Frame$_{t-1}$의 MV까지도 예측 시작점으로 선택하여 탐색의 시작점을 다양화 하였다. 실험 결과 탐색 시작점을 다양화 함으로써 full search를 제외한 diamond search, hexagonal search, 4 step search등 기존의 탐색 알고리즘보다 30$\sim$80% 더 작은 SAD값을 구할 수 있었다.