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http://dx.doi.org/10.5573/ieek.2013.50.11.064

Design of a CMOS Image Sensor Based on a 10-bit Two-Step Single-Slope ADC  

Hwang, Inkyung (Dept. of Semiconductor Science, Dongguk Univ.)
Kim, Daeyun (Dept. of Semiconductor Science, Dongguk Univ.)
Song, Minkyu (Dept. of Semiconductor Science, Dongguk Univ.)
Publication Information
Journal of the Institute of Electronics and Information Engineers / v.50, no.11, 2013 , pp. 64-69 More about this Journal
Abstract
In this paper, a high-speed CMOS Image Sensor (CIS) based on a 10-bit two-step single-slope A/D converter is proposed. The A/D converter is composed of both a 5-bit coarse ADC and a 6-bit fine ADC, and the conversion speed is 10 times faster than that of the single-slope A/D converter. In order to have a small noise characteristics, further, a Digital Correlated Double Sampling(D-CDS) is also discussed. The proposed A/D converter has been fabricated with 0.13um 1-poly 4-metal CIS process, and it has a QVGA($320{\times}240$) resolution. The fabricated chip size is $5mm{\times}3mm$, and the power consumption is about 35mW at 3.3V supply voltage. The measured conversion speed is 10us, and the frame rate is 220 frames/s.
Keywords
Two-Step Single Slope ADC; CMOS Image Sensor; Digital Correlated Double Sampling;
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