• Proceedings of the CALSEC Conference
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• 2000.08a
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• pp.99-114
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• 2000

ㆍ General - ISO 10303-202 : Associative draughting (CDS initiatve) ㆍ Building Construction - ISO 10303-225 : Building elements using explicit shape representation - ISO 10303-230 : Building structural frames : steelwork (CIMSTEEL) (중략)

• Nano
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• v.13 no.12
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• pp.1850147.1-1850147.14
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• 2018

In this work, water-soluble and blue-emitting carbon nanodots (CDs) were synthesized from apple peels for the first time via one-step hydrothermal method. The synthetic route is facile, green, economical and viable. The as-prepared CDs were characterized thoroughly by transmission electron microscopy (TEM), X-ray diffraction (XRD), Raman, Fourier transform infrared (FT-IR), X-ray photoelectron (XPS), fluorescence and UV-Vis absorption spectroscopy in terms of their morphology, surface functional groups and optical properties. The results show that these CDs possessed ultrasmall size, good dispersivity, and high tolerance to pH, ionic strength and continuous UV irradiation. Significantly, the CDs had fast and reversible response towards temperature, and the accurate linear relationship between fluorescence intensity and temperature was used to design a novel nanothermometer in a broad temperature range from 5 to $65^{\circ}C$ facilely. In addition, the fluorescence intensity of CDs was observed to be quenched immediately by Cr(VI) ions based on the inner filter effect. A low-cost Cr(VI) ions sensor was proposed employing CDs as fluorescent probe, and it displayed a wide linear range from 0.5 to $200{\mu}M$ with a detection limit of $0.73{\mu}M$. The practicability of the developed Cr(VI) sensor for real water sample assay was also validated with satisfactory recoveries.

• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.11
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• pp.64-69
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• 2013

In this paper, a high-speed CMOS Image Sensor (CIS) based on a 10-bit two-step single-slope A/D converter is proposed. The A/D converter is composed of both a 5-bit coarse ADC and a 6-bit fine ADC, and the conversion speed is 10 times faster than that of the single-slope A/D converter. In order to have a small noise characteristics, further, a Digital Correlated Double Sampling(D-CDS) is also discussed. The proposed A/D converter has been fabricated with 0.13um 1-poly 4-metal CIS process, and it has a QVGA($320{\times}240$) resolution. The fabricated chip size is $5mm{\times}3mm$, and the power consumption is about 35mW at 3.3V supply voltage. The measured conversion speed is 10us, and the frame rate is 220 frames/s.

• JSTS:Journal of Semiconductor Technology and Science
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• v.14 no.2
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• pp.246-251
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• 2014

In this paper, a high-speed CMOS Image Sensor (CIS) based on a 10-bit two step Single Slope A/D Converter (SS-ADC) is proposed. The A/D converter is composed of both 5-bit coarse ADC and a 6-bit fine ADC, and the conversion speed is 10 times faster than that of the single-slope A/D convertor. In order to reduce the pixel noise, further, a Hybrid Correlated Double Sampling (H-CDS) is also discussed. The proposed A/D converter has been fabricated with 0.13um 1-poly 4-metal CIS process, and it has a QVGA ($320{\times}240$) resolution. The fabricated chip size is $5mm{\times}3mm$, and the power consumption is about 35 mW at 3.3 V supply voltage. The measured conversion speed is 10 us, and the frame rate is 220 frames/s.

• Korean Journal of Computational Design and Engineering
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• v.10 no.2
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• pp.121-132
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• 2005

There have been several efforts for the investigation of the formal development team which was formed in the IAI to develop a common 2D standard specification between ISO/STEP and IAI/IFC since 2002. As a result, a drafting model has been included in the IFC2.x2 model. However, to be used actively in the construction practice for construction drawing exchange, the IFC model should be extended to the paper space for multiple views, drawing output, and delivery of drawings. Therefore, in this paper, the methodology of relating STEP and IFC has been investigated and schema extension of paper space(drawing sheet, presentation view, view pipeline), complex entity(leader), and dimension(associative) have been achieved. The resulting, IFC model will enable a basic harmonization with KOSDIC. SCADEC, and STEP-CDS by retaining the current IFC architecture. In addition, IT systems for the construction industry can be beneficial from the developed data model.

• Journal of Auto-vehicle Safety Association
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• v.10 no.4
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• pp.40-49
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• 2018

Currently, a lot of researches about high risk test scenarios for autonomous vehicle and advanced driver assistance systems have been carried out to evaluate driving safety. This study proposes new type of test scenario that evaluate the driving safety for autonomous vehicle by reconstructing accident database of national automotive sampling system crashworthiness data system (NASS-CDS). NASS-CDS has a lot of detailed accident data in real fields, but there is no data of accurate velocity in accident moments. So in order to propose scenario generation method from accident database, we try to reconstruct accident moment from accident sketch diagram. At the same step, we propose an accident of occurrence frequency which is based on accident codes and road shapes. The reconstruction paths from accident database are integrated into evaluation of simulation environment. Our proposed methods and processor are applied to MILS (Model In the Loop Simulation) and VILS (Vehicle In the Loop Simulation) test environments. In this paper, a reasonable method of accident reconstruction typology for autonomous vehicle evaluation of feasibility is proposed.

• 전자공학회논문지 IE
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• v.43 no.4
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• pp.37-42
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• 2006

This paper proposes a adaptive video watermarking algorithm according to bitrate and motion vector size in MPEG2 system. The watermark strength in the I-frames is adapted for quantization step size and the strength in the P-B-frames is adapted for quantization step size and motion vector of macroblock to make the watermark more robust against the accompanying degradation due to aggressively compression. A realtime watermark extraction is done directly in the DCT domain during MPEG decoding without full decoding of MPEG video. The experimental simulations show that the video quality results almost invisible difference between the watermarked frames and the original frames and the watermark is resistant to frame dropping, MPEG compression, GoP conversion and low pass filter attacks.

• The Journal of Society for e-Business Studies
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• v.9 no.2
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• pp.87-108
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• 2004

The current construction industry mainly uses paper-based construction documents which are produced during the whole life cycle. The paper-based information hinders to reuse the construction information, due to the inefficiency to exchange and share the construction information between designers and constructors. To overcome these problems, construction CALS/EC (Continuous Acquisition and Life Cycle Support/Electronic Commerce) has been proposed by the government. It supports efficient reusing, sharing and exchanging the construction information using digitalized drawings and documentations. This study intends to show the future applying methodologies of using the standardized key technologies in the construction CALS/EC based on the case study of Korea and several countries.

• Journal of Sensor Science and Technology
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• v.27 no.2
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• pp.93-98
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• 2018

In this paper, an energy-efficient 11.49-bit successive approximation register (SAR) capacitance-to-digital converter (CDC) for capacitive sensors with a figure of merit (FoM) of 31.6 pJ/conversion-step is presented. The CDC employs a SAR algorithm to obtain low power consumption and a simplified structure. The proposed circuit uses a capacitive sensing amplifier (CSA) and a dynamic latch comparator to achieve parasitic capacitance-insensitive operation. The CSA adopts a correlated double sampling (CDS) technique to reduce flicker (1/f) noise to achieve low-noise characteristics. The SAR algorithm is implemented in dual operating mode, using an 8-bit coarse programmable capacitor array in the capacitance-domain and an 8-bit R-2R digital-to-analog converter (DAC) in the charge-domain. The proposed CDC achieves a wide input capacitance range of 29.4 pF and a high resolution of 0.449 fF. The CDC is fabricated in a $0.18-{\mu}m$ 1P6M complementary metal-oxide-semiconductor (CMOS) process with an active area of 0.55 mm2. The total power consumption of the CDC is $86.4{\mu}W$ with a 1.8-V supply. The SAR CDC achieves a measured 11.49-bit resolution within a conversion time of 1.025 ms and an energy-efficiency FoM of 31.6 pJ/step.

• Proceedings of the Korean Information Science Society Conference
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• 2006.10a
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• pp.153-157
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• 2006

기존의 탐색 알고리즘은 탐색 창 내의 원점에서 탐색을 시작한다. 하지만 영상은 일정한 방향으로 규칙적으로 움직이는 것이 많기 때문에 Frame$_t$ 의 움직임 벡터(MV)가 Frame$_{t-1}$의 움직임 벡터와 같을 가능성이 크다. 이를 참고하여 본 논문에서는 시작점을 원점뿐만 아니라 Frame$_{t-1}$의 MV까지도 예측 시작점으로 선택하여 탐색의 시작점을 다양화 하였다. 실험 결과 탐색 시작점을 다양화 함으로써 full search를 제외한 diamond search, hexagonal search, 4 step search등 기존의 탐색 알고리즘보다 30$\sim$80% 더 작은 SAD값을 구할 수 있었다.