• Title/Summary/Keyword: Round Key

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Development of Health Promotion Program through IUHPE : Possibilities of Collaboration in East Asia

  • Moriyama, Masaki
    • Korean Journal of Health Education and Promotion
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    • v.22 no.3
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    • pp.97-107
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    • 2005
  • This paper considers the possibilities of health promotion from the following perspectives; (1) IUHPE, (2) socio-cultural similarities, (3) action research, and (4) learning from our past. 1. The IUHPE values decentralized activities through regions, and countries such as Japan, Korea, Hong Kong, Taiwan and China belong to NPWP region. Since IUHPE World Conference was held in Japan in 1995, Japan used to occupy more than 60% of NPWP membership. After 2001, membership is increasing rapidly in Chinese speaking sub-region. The transnational collaboration is still in its beginning phase. 2. Confucianism is one of key points. Confucian tradition should not be seen only as obstacles but as advantages to seek a form of health promotion more acceptable in East Asia. 3 Within the new public health framework, people are expected to create and live their health. However, especially in Japan, the tendency of 'lacking of face-to-face explicit interactions' is still common at health-promotion settings as well as academic settings. Therefore, the author tried participatory approaches such as asking WIFY(interactive questions designed for subjects to review their daily life and environment) and as introducing round table interactions. So far, majority of participants welcome new trials. 4. The following social phenomena are comparatively discussed after Japanese invasion and occupation of Korea ended in 1945; status of oriental medicine, separation of dispensary services, and health promotion specialist as a national license. In contrast to Japanese' tendency of maintaining the status quo and postponing of substantial social change, trend toward rapid and dynamic social changes are more commonly observed in Korea. Although all of above possibilities are still in their beginning stages, they are going to offer interesting directions waiting for further challenges and accompanying researches.

High-speed Design of 8-bit Architecture of AES Encryption (AES 암호 알고리즘을 위한 고속 8-비트 구조 설계)

  • Lee, Je-Hoon;Lim, Duk-Gyu
    • Convergence Security Journal
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    • v.17 no.2
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    • pp.15-22
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    • 2017
  • This paper presents new 8-bit implementation of AES. Most typical 8-bit AES designs are to reduce the circuit area by sacrificing its throughput. The presented AES architecture employs two separated S-box to perform round operation and key generation in parallel. From the simulation results of the proposed AES-128, the maximum critical path delay is 13.0ns. It can be operated in 77MHz and the throughput is 15.2 Mbps. Consequently, the throughput of the proposed AES has 1.54 times higher throughput than the other counterpart although the area increasement is limited in 1.17 times. The proposed AES design enables very low-area design without sacrificing its performance. Thereby, it can be suitable for the various IoT applications that need high speed communication.

Core Competence Evaluation Model of Play Worker Based on Delphi Technique (델파이 조사를 통한 놀이 전문가 핵심역량 분석)

  • Park, Hye-Jin;Kim, Yong-Young
    • Journal of Convergence for Information Technology
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    • v.9 no.2
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    • pp.100-107
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    • 2019
  • The purpose of this study is to develop an evaluation model to measure the core competences of actual play workers by exploring what competences are necessary for them to provide quality play. Based on literature review, we selected five core competences : knowledge of play, program development, understanding play culture, creativity, and information sharing & applying. In order to achieve the research purpose end, a two-round Delphi survey was conducted on 10 play and education experts. The findings drew scholarly consensus on the competences of play workers to have and proposed basic data by developing competences evaluation model to measure them. Each of the key competences has three sub-conpetences, each of which included two behavior elements. Furthermore, this study presented future research directions so that play can be voluntarily planned and supported in a social and cultural context.

Design of Crypto-processor for Internet-of-Things Applications (사물인터넷 응용을 위한 암호화 프로세서의 설계)

  • Ahn, Jae-uk;Choi, Jae-Hyuk;Ha, Ji-Ung;Jung, Yongchul;Jung, Yunho
    • Journal of Advanced Navigation Technology
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    • v.23 no.2
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    • pp.207-213
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    • 2019
  • Recently, the importance for internet of things (IoT) security has increased enormously and hardware-based compact chips are needed in IoT communication industries. In this paper, we propose low-complexity crypto-processor that unifies advanced encryption standard (AES), academy, research, institute, agency (ARIA), and CLEFIA protocols into one combined design. In the proposed crypto-processor, encryption and decryption processes are shared, and 128-bit round key generation process is combined. Moreover, the shared design has been minimized to be adapted in generic IoT devices and systems including lightweight IoT devices. The proposed crypto-processor was implemented in Verilog hardware description language (HDL) and synthesized to gate level circuit in 65nm CMOS process, which results in 11,080 gate counts. This demonstrates roughly 42% better than the aggregates of three algorithm implementations in the aspect of gate counts.

Design of AES-Based Encryption Chip for IoT Security (IoT 보안을 위한 AES 기반의 암호화칩 설계)

  • Kang, Min-Sup
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.21 no.1
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    • pp.1-6
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    • 2021
  • The paper proposes the design of AES-based encryption chip for IoT security. ROM based S-Box implementation occurs a number of memory space and some delay problems for its access. In this approach, S-Box is designed by pipeline structure on composite field GF((22)2) to get faster calculation results. In addition, in order to achieve both higher throughput and less delay, shared S-Box are used in each round transformation and the key scheduling process. The proposed AES crypto-processor is described in Veilog-HDL, and Xilinx ISE 14.7 tool is used for logic synthesis by using Xilinx XC6VLX75T FPGA. In order to perform the verification of the crypto-processor, the timing simulator(ModelSim 10.3) is also used.

High Speed AES Implementation on 64 bits Processors (64-비트 프로세서에서 AES 고속 구현)

  • Jung, Chang-Ho;Park, Il-Hwan
    • Journal of the Korea Institute of Information Security & Cryptology
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    • v.18 no.6A
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    • pp.51-61
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    • 2008
  • This paper suggests a new way to implement high speed AES on Intel Core2 processors and AMD Athlon64 processors, which are used all over the world today. First, Core2 Processors of EM64T architecture's memory-access-instruction processing efficiency are lower than calculus-instruction processing efficiency. So, previous AES implementation techniques, which had a high rate of memory-access-instruction, could cause memory-bottleneck. To improve this problem we present the partial round key techniques that reduce the rate of memory-access-instruction. The result in Intel Core2Duo 3.0 Ghz Processors show 185 cycles/block and 2.0 Gbps's throughputs in ECB mode. This is 35 cycles/block faster than bernstein software, which is known for being the fastest way. On the other side, in AMD64 processors of AMD64 architecture, by removing bottlenecks that occur in decoding processing we could improve the speed, with the result that the Athlon64 processor reached 170 cycles/block. The result that we present is the same performance of Matsui's unpublished software.

Area Efficient Implementation of 32-bit Architecture of ARIA Block Cipher Using Light Weight Diffusion Layer (경량화된 확산계층을 이용한 32-비트 구조의 소형 ARIA 연산기 구현)

  • Ryu, Gwon-Ho;Koo, Bon-Seok;Yang, Sang-Woon;Chang, Tae-Joo
    • Journal of the Korea Institute of Information Security & Cryptology
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    • v.16 no.6
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    • pp.15-24
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    • 2006
  • Recently, the importance of the area efficient implementation of cryptographic algorithm for the portable device is increasing. Previous ARIA(Academy, Research Institute, Agency) implementation styles that usually concentrate upon speed, we not suitable for mobile devices in area and power aspects. Thus in this paper, we present an area efficient AR processor which use 32-bit architecture. Using new implementation technique of diffusion layer, the proposed processor has 11301 gates chip area. For 128-bit master key, the ARIA processor needs 87 clock cycles to generate initial round keys, n8 clock cycles to encrypt, and 256 clock cycles to decrypt a 128-bit block of data. Also the processor supports 192-bit and 256-bit master keys. These performances are 7% in area and 13% in speed improved results from previous cases.

A new method of predicting hotspot stresses for longitudinal attachments with reduced element sensitivities

  • Li, Chun Bao;Choung, Joonmo
    • International Journal of Naval Architecture and Ocean Engineering
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    • v.13 no.1
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    • pp.379-395
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    • 2021
  • For the complicated structural details in ships and offshore structures, the traditional hotspot stress approaches are known to be sensitive to the element variables of element topologies, sizes, and integration schemes. This motivated to develop a new approach for predicting reasonable hotspot stresses, which is less sensitive to the element variables and easy to be implemented the real marine structures. The three-point bending tests were conducted for the longitudinal attachments with the round and rectangular weld toes. The tests were reproduced in the numerical simulations using the solid and shell element models, and the simulation technique was validated by comparing the experimental stresses with the simulated ones. This paper considered three hotspot stress approaches: the ESM method based on surface stress extrapolation, the Dong's method based on nodal forces along a weld toe, and the proposed method based on nodal forces perpendicular to an imaginary vertical plane at a weld toe. In order to study the element sensitivities of each method, 16 solid element models and 8 shell element models were generated under the bending and tension loads, respectively. The element sensitivity was analyzed in terms of Stress Concentration Factors (SCFs) in viewpoints of two statistical quantities of mean and bias with respect to the reference SCFs. The average SCFs predicted by the proposed method were remarkably in good agreement with the reference SCFs based on the experiments and the ship rules. Negligibly small Coefficients of Variation (CVs) of the SCFs, which is measure of statistical bias, were drawn by the proposed method.

Porcine epidemic diarrhea virus: an update overview of virus epidemiology, vaccines, and control strategies in South Korea

  • Guehwan Jang;Duri Lee;Sangjune Shin;Jeonggyo Lim;Hokeun Won;Youngjoon Eo;Cheol-Ho Kim;Changhee Lee
    • Journal of Veterinary Science
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    • v.24 no.4
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    • pp.58.1-58.25
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    • 2023
  • Porcine epidemic diarrhea virus (PEDV) has posed significant financial threats to the domestic pig industry over the last three decades in South Korea. PEDV infection will mostly result in endemic persistence in the affected farrow-to-finish (FTF) herds, leading to endemic porcine epidemic diarrhea (PED) followed by year-round recurrent outbreaks. This review aims to encourage collaboration among swine producers, veterinarians, and researchers to offer answers that strengthen our understanding of PEDV in efforts to prevent and control endemic PED and to prepare for the next epidemics or pandemics. We found that collaboratively implementing a PED risk assessment and customized four-pillar-based control measures is vital to interrupt the chain of endemic PED in affected herds: the former can identify on-farm risk factors while the latter aims to compensate for or improve weaknesses via herd immunity stabilization and virus elimination. Under endemic PED, long-term virus survival in slurry and asymptomatically infected gilts ("Trojan Pigs") that can transmit the virus to farrowing houses are key challenges for PEDV eradication in FTF farms and highlight the necessity for active monitoring and surveillance of the virus in herds and their environments. This paper underlines the current knowledge of molecular epidemiology and commercially available vaccines, as well as the risk assessment and customized strategies to control PEDV. The intervention measures for stabilizing herd immunity and eliminating virus circulation may be the cornerstone of establishing regional or national PED eradication programs.

Analysis on Decryption Failure Probability of TiGER (TiGER의 복호화 실패율 분석)

  • Seungwoo Lee;Jonghyun Kim;Jong Hwan Park
    • Journal of the Korea Institute of Information Security & Cryptology
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    • v.34 no.2
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    • pp.157-166
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    • 2024
  • Probability of decryption failure of a public key cryptography based on LWE(learning with errors) is determined by its architecture and parameter settings. Since large decryption failure probability leads to attacks[1] on scheme as well as degradation of performance, TiGER[2], a Ring-LWE(R)-based KEM proposed for the first round of KpqC, tried to reduce the decryption failure probability by using error correction code Xef and D2 encoding method. However, D'Anvers et al. has shown that the commonly assumed independence of each bit error is not established since in the case of an encryption scheme based on Ring-LWE(R) using an error correction code, there is error dependency which is not negligible[3]. In this paper, since TiGER does not consider the error dependency, we calcualte the decryption failure probability of TiGER by considering the error dependency. In addition, we found that the bit error probability is incorrectly calculated in TiGER, so we present the correct calculation.