• Korean Journal of Materials Research
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• v.12 no.10
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• pp.820-824
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• 2002

It is of importance to know that the bonding strength and interfacial stress of SOI wafer pairs to meet with mechanical and thermal stresses during process. We fabricated Si/2000$\AA$-SiO$_2$ ∥ 2000$\AA$-SiO$_2$/Si SOI wafer pairs with electric furnace annealing, rapid thermal annealing (RTA), and fast linear annealing (FLA), respectively, by varying the annealing temperatures at a given annealing process. Bonding strength and interfacial stress were measured by a razor blade crack opening method and a laser curvature characterization method, respectively. All the annealing process induced the tensile thermal stresses. Electrical furnace annealing achieved the maximum bonding strength at $1000^{\circ}C$-2 hr anneal, while it produced constant thermal tensile stress by $1000^{\circ}C$. RTA showed very small bonding strength due to premating failure during annealing. FLA showed enough bonding strength at $500^{\circ}C$, however large thermal tensile stress were induced. We confirmed that premated wafer pairs should have appropriate compressive interfacial stress to compensate the thermal tensile stress during a given annealing process.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2005.07a
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• pp.466-467
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• 2005

Al doped zinc oxide films (ZnO:Al) were deposited on glass substrate by RF magnetron sputtering from a ZnO target mixed with 2 wt% $Al_2O_3$. The as-deposited ZnO:Al films were rapid-thermal annealed. Electrical properties and structural evolution of the films, as annealed by rapid thermal process (RTP), were studied and compared with the films annealed by conventional annealing process. RTP, the (002) peak intensity increases and the electrical resistivity decreases by 20%, after RT annealing. The effects of RT annealing on the structural evolution and electrical properties of RF sputtered films were further discussed and compared also with the films deposited by DC magnetron sputtering.

• Proceedings of the KIEE Conference
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• 2006.07c
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• pp.1424-1425
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• 2006

A four-step rapid thermal annealing (RTA) process is proposed in order to improve the throughput and stabilize the process, compared to the six-step RTA process. Effects of annealing on the properties of a structure mode of CMOS process in both cases were investigated. The implanted dopant(As, $BF_2$ and Ti/TiN) movement in silicon during different rapid thermal annealing conditions was studied using secondary ion mass spectroscopy (SIMS) technique. These results show that the four-step RTA process significantly improves time effect and throughput (15%) by the condition of ramping up compared to the six-step RTA process.

• Transactions on Electrical and Electronic Materials
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• v.3 no.1
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• pp.42-45
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• 2002

Properties of lead zirconate titanate ferroelectric thin films prepared by rapid thermal annealing/direct insertion thermal annealing were investigated. The remnant polarization (Pr), saturation polarization (Ps), and coercive force (Ec) of typical samples annealed by rapid thermal annealing (RTA) are about 13.7 $\mu$ C/cm$^2$, 27.1 $\mu$C/cm$^2$, and 55.6 kV/cm, respectively. The dielectric constant of the sample is about 786, the dielectric loss tangent is about 2.4% at 1 kHz. Furthermore, ferroelectric, conduction, and piezoelectric properties of the thin films annealed by RTA process and the direct insertion thermal annealing (DITA) process were compared. The influence of temperature in the dry process on the above properties was also investigated.

• Electrical & Electronic Materials
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• v.7 no.2
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• pp.152-156
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• 1994

The rapid thermal annealing effects of Sol-Gel derived ferroelectric PZT thin films were investigated. It was found that rapid thermal annealing(RTA) of spin coated thin films on silicon typically >$800^{\circ}C$ for about 1 min. was changed to the perovskite phase. Rapid thermally annealed films recorded maximum remanent polarization of about 5 .mu.C/cm$^{2}$, coercive field of around 30kV/cm. The switching time for polarization reversal was about 220ns. The films of RTA process showed smooth surface, and high breakdown voltages of over 1 MV/cm and resistivity of $1{\times}{10^12}$ .ohm.cm at 1 MV/cm. It was verified that the polarization reversal of the PZT film was varied partially with applying the multiple short pulse.

• Journal of the Korean Magnetics Society
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• v.25 no.2
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• pp.47-51
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• 2015

To achieve a high tunneling magneto resistance (TMR) of sputtered magnetic tunnel junctions (MTJs) with an MgO barrier, the annealing process is indispensable. The structural and compositional changes as consequences of the annealing greatly affect the spin-dependent transport properties of MTJs. Higher TMR could be obtained for MTJs annealed at higher annealing temperature. The diffusion of Ru, Mn and/or Ta in the MTJs may occur during annealing process, which is known to be detrimental to spin-dependent tunneling effect. The rapid thermal annealing (RTA) process was used for annealing the MTJs with synthetic antiferromagnets. To suppress the diffusion of Mn, Ru and/or Ta in the MTJs, the process time and temperature of RTA were minutely controlled.

• Proceedings of the KIEE Conference
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• 1988.07a
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• pp.375-378
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• 1988

In this paper a newly designed rapid thermal process (RTP) structure is proposed to the slip induced in silicon wafers considerably. The reflectors and a graphite radiation were used to compensate the temperature difference causing slip in silicon wafers. From our experiments it is known that slip can be removed during a rapid thermal annealing at high temperature.

• Korean Journal of Materials Research
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• v.18 no.10
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• pp.552-556
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• 2008

Modified thermal annealing was applied to the activation of the polycrystalline silicon films doped as p-type through implantation of $B_2H_6$. The statistical design of experiments was successfully employed to investigate the effect of rapid thermal annealing on activation of polycrystalline Si doped as p-type. In this design, the input variables are furnace temperature, power of halogen lamps, and alternating magnetic field. The degree of ion activation was evaluated as a function of processing variables, using Hall effect measurements and Raman spectroscopy. The main effects were estimated to be furnace temperature and RTA power in increasing conductivity, explained by recrystallization of doped ions and change of an amorphous Si into a crystalline Si lattice. The ion activation using rapid thermal annealing is proven to be a highly efficient process in low temperature polycrystalline Si technology.

• Journal of the Semiconductor & Display Technology
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• v.21 no.3
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• pp.105-109
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• 2022

For the realization of higher reliable transition metal dichalcogenide layer, molybdenum disulfide was formed on sapphire substrate by direct current sputtering and subsequent rapid thermal annealing process. Unlike RF sputtered MoS₂ thin films, DC sputtered showed no irregular holes and protrusions after annealing process from scanning electron microscope images. From atomic force microscope results, it was possible to investigate that surface roughness of MoS₂ thin films were more dependent on DC sputtering power then annealing temperature. On the other hand, the Raman scattering spectra showed the dependency of significant E¹_2g and A¹_g peaks on annealing temperatures.

• Journal of the Korean Crystal Growth and Crystal Technology
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• v.29 no.2
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• pp.50-53
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• 2019

In this study, polycrystalline silicon thin film useful for the solar cells was fabricated by AIC(Aluminum Induced Crystallization) process. A diffusing barrier for this process is prepared with $Al_2O_3$. For the maximization of the grain size of the polycrystalline silicon, a selective blasting of the $Al_2O_3$ diffusing barrier was conducted before annealing treatment. The heat treatment for the activation of the amorphous-Si (a-Si) layer was carried out with Rapid Thermal Annealing (RTA) process. Crystallization of the a-Si layer was analyzed with XRD. It was confirmed that a-Si was crystallized at $500^{\circ}C$ and the silicon crystal is observed to be formed and the grain size of the polycrystalline silicon was observed to be $15.9{\mu}m$.