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Stress Evolution with Annealing Methods in SOI Wafer Pairs

열처리 방법에 따른 SOI 기판의 스트레스변화

  • Seo, Tae-Yune (Department of Materials Science and Engineering, The University of Seoul) ;
  • Lee, Sang-Hyun (Department of Materials Science and Engineering, The University of Seoul) ;
  • Song, Oh-Sung (Department of Materials Science and Engineering, The University of Seoul)
  • 서태윤 (서울시립대학교 재료공학과) ;
  • 이상현 (서울시립대학교 재료공학과) ;
  • 송오성 (서울시립대학교 재료공학과)
  • Published : 2002.10.01

Abstract

It is of importance to know that the bonding strength and interfacial stress of SOI wafer pairs to meet with mechanical and thermal stresses during process. We fabricated Si/2000$\AA$-SiO$_2$ ∥ 2000$\AA$-SiO$_2$/Si SOI wafer pairs with electric furnace annealing, rapid thermal annealing (RTA), and fast linear annealing (FLA), respectively, by varying the annealing temperatures at a given annealing process. Bonding strength and interfacial stress were measured by a razor blade crack opening method and a laser curvature characterization method, respectively. All the annealing process induced the tensile thermal stresses. Electrical furnace annealing achieved the maximum bonding strength at $1000^{\circ}C$-2 hr anneal, while it produced constant thermal tensile stress by $1000^{\circ}C$. RTA showed very small bonding strength due to premating failure during annealing. FLA showed enough bonding strength at $500^{\circ}C$, however large thermal tensile stress were induced. We confirmed that premated wafer pairs should have appropriate compressive interfacial stress to compensate the thermal tensile stress during a given annealing process.

Keywords

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